diff mbox series

[v6,4/4] clk: qcom: lcc-ipq806x: use ARRAY_SIZE for num_parents

Message ID 20220723145558.25210-4-ansuelsmth@gmail.com (mailing list archive)
State Superseded, archived
Headers show
Series [v6,1/4] dt-bindings: clock: add pcm reset for ipq806x lcc | expand

Commit Message

Christian Marangi July 23, 2022, 2:55 p.m. UTC 
Use ARRAY_SIZE for num_parents instead of raw number to prevent any
confusion/mistake.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 drivers/clk/qcom/lcc-ipq806x.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Dmitry Baryshkov July 23, 2022, 3:16 p.m. UTC | #1 
On Sat, 23 Jul 2022 at 17:56, Christian Marangi <ansuelsmth@gmail.com> wrote:
>
> Use ARRAY_SIZE for num_parents instead of raw number to prevent any
> confusion/mistake.
>
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff mbox series

Patch

diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c
index 1833e59a6434..81a44a9a9abc 100644
--- a/drivers/clk/qcom/lcc-ipq806x.c
+++ b/drivers/clk/qcom/lcc-ipq806x.c
@@ -134,7 +134,7 @@  static struct clk_rcg mi2s_osr_src = {
 		.hw.init = &(struct clk_init_data){
 			.name = "mi2s_osr_src",
 			.parent_data = lcc_pxo_pll4,
-			.num_parents = 2,
+			.num_parents = ARRAY_SIZE(lcc_pxo_pll4),
 			.ops = &clk_rcg_ops,
 			.flags = CLK_SET_RATE_GATE,
 		},
@@ -251,7 +251,7 @@  static struct clk_rcg pcm_src = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcm_src",
 			.parent_data = lcc_pxo_pll4,
-			.num_parents = 2,
+			.num_parents = ARRAY_SIZE(lcc_pxo_pll4),
 			.ops = &clk_rcg_ops,
 			.flags = CLK_SET_RATE_GATE,
 		},
@@ -335,7 +335,7 @@  static struct clk_rcg spdif_src = {
 		.hw.init = &(struct clk_init_data){
 			.name = "spdif_src",
 			.parent_data = lcc_pxo_pll4,
-			.num_parents = 2,
+			.num_parents = ARRAY_SIZE(lcc_pxo_pll4),
 			.ops = &clk_rcg_ops,
 			.flags = CLK_SET_RATE_GATE,
 		},
@@ -392,7 +392,7 @@  static struct clk_rcg ahbix_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "ahbix",
 			.parent_data = lcc_pxo_pll4,
-			.num_parents = 2,
+			.num_parents = ARRAY_SIZE(lcc_pxo_pll4),
 			.ops = &clk_rcg_lcc_ops,
 		},
 	},