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[87.7.207.127]) by smtp.googlemail.com with ESMTPSA id cy24-20020a0564021c9800b0043ba1ecb0dfsm4143781edb.75.2022.07.23.07.56.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Jul 2022 07:56:05 -0700 (PDT) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v6 4/4] clk: qcom: lcc-ipq806x: use ARRAY_SIZE for num_parents Date: Sat, 23 Jul 2022 16:55:58 +0200 Message-Id: <20220723145558.25210-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220723145558.25210-1-ansuelsmth@gmail.com> References: <20220723145558.25210-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Use ARRAY_SIZE for num_parents instead of raw number to prevent any confusion/mistake. Signed-off-by: Christian Marangi Reviewed-by: Dmitry Baryshkov --- drivers/clk/qcom/lcc-ipq806x.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c index 1833e59a6434..81a44a9a9abc 100644 --- a/drivers/clk/qcom/lcc-ipq806x.c +++ b/drivers/clk/qcom/lcc-ipq806x.c @@ -134,7 +134,7 @@ static struct clk_rcg mi2s_osr_src = { .hw.init = &(struct clk_init_data){ .name = "mi2s_osr_src", .parent_data = lcc_pxo_pll4, - .num_parents = 2, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_ops, .flags = CLK_SET_RATE_GATE, }, @@ -251,7 +251,7 @@ static struct clk_rcg pcm_src = { .hw.init = &(struct clk_init_data){ .name = "pcm_src", .parent_data = lcc_pxo_pll4, - .num_parents = 2, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_ops, .flags = CLK_SET_RATE_GATE, }, @@ -335,7 +335,7 @@ static struct clk_rcg spdif_src = { .hw.init = &(struct clk_init_data){ .name = "spdif_src", .parent_data = lcc_pxo_pll4, - .num_parents = 2, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_ops, .flags = CLK_SET_RATE_GATE, }, @@ -392,7 +392,7 @@ static struct clk_rcg ahbix_clk = { .hw.init = &(struct clk_init_data){ .name = "ahbix", .parent_data = lcc_pxo_pll4, - .num_parents = 2, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_lcc_ops, }, },