| Message ID | 20220926102523.2367530-5-wenst@chromium.org (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | clk: mediatek: More cleanups | expand |
diff --git a/drivers/clk/mediatek/clk-mt8192.c b/drivers/clk/mediatek/clk-mt8192.c index e39012583675..c2ce72df6db0 100644 --- a/drivers/clk/mediatek/clk-mt8192.c +++ b/drivers/clk/mediatek/clk-mt8192.c @@ -1246,6 +1246,12 @@ static int clk_mt8192_top_probe(struct platform_device *pdev) if (r) return r; + /* + * Remove clock provider set in clk_mt8192_top_init_early() first + * to avoid duplicate entry, and re-add it so the OF related code + * gets run again with the full set of clocks. + */ + of_clk_del_provider(node); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, top_clk_data); }
The MT8192 topckgen clock driver is split into two parts, an early CLK_OF_DECLARE_DRIVER() part which registers one clock solely for the system timer, and a standard platform driver part that handles the rest. In both parts, of_clk_hw_add_provider() is called, causing the clk provider to be added twice. While this doesn't cause issues, it isn't clean either. Remove the existing entry before calling of_clk_hw_add_provider() in the platform driver probe function. This ensures that there is only one entry, and the OF related code still runs on the full set of clocks. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> --- drivers/clk/mediatek/clk-mt8192.c | 6 ++++++ 1 file changed, 6 insertions(+)