From patchwork Thu Sep 29 09:21:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12993799 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDBB8C43217 for ; Thu, 29 Sep 2022 09:21:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235595AbiI2JVy (ORCPT ); Thu, 29 Sep 2022 05:21:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36798 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235539AbiI2JVw (ORCPT ); Thu, 29 Sep 2022 05:21:52 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D534512FF0A for ; Thu, 29 Sep 2022 02:21:50 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id bu25so1349258lfb.3 for ; Thu, 29 Sep 2022 02:21:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=X8d8auaUbYkg/6BCuQEexEp/WA8mtD7KzcUJSiwcBSs=; b=l0pp2hyfH02PtSu/WYyH1qOFOXB5qovpcMT+klxNroKvH90NrQkCumkDXO5VrEaqrG MRTm6SPgNxciQsR9tiFUCyKQIUX0n8hvtl+BDukkX7jf0xksMvORNZBEV0VxMfTE7u+m UIMM3x17h+3DE+Mr4Hpo+3ekA+k57jYCqIBvu+dvEqFDkSXSIMqsP6yXch7346WbUqNM NqqpNhD2EFxO6crbiDQ0/PBYQHSPRJSjE4iJ16bXKcHfkkxLxVnFAjslMLaLnGRFDD8F zSvxlp8UNzDGAyRSqovLJ/sIbwg2SeYgCmDamaB8vdvvS2Yjy1HJLsl6fjZUIFFvMNqO /VYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=X8d8auaUbYkg/6BCuQEexEp/WA8mtD7KzcUJSiwcBSs=; b=gQeUgXRTF2o1XMkxSfQkPaG7Tlw1QypcdD68ZiOc6Z4JLRDbw9tBa+05APzydS5AbV 87tgQSEyNuKvxY9d5tOxF9x5Hx73ecRCb4Yop5SNfN2h2c9Dha+1x2iY7v/ZVq8dzvrn SfH3867sn1EE4p4zmHDsnWyA2km2y1oLc8bh6Vet4yL4RUTfOSPeijXnUNDPXG8QxdA9 Fl+wRW+bfjE9+qyhh3q3/UXtTrVzFALudDygZ3O0khkLk33+j/JvmdGEWTSQ7/VwLJ0A ogtjGxE/0AdTy/isyCbMaIb06jfoo8DXjm7ha5rA55iWcw4okfM99oztgxXmIIZsDHpj EpdA== X-Gm-Message-State: ACrzQf3gPrWjSFSwNj/VSU4M/kUKXr+BvcjR/DqGurKEj5ZUNK8Fzzhc OOdtpTqnJdtajnOZvm5TtV/Ijg== X-Google-Smtp-Source: AMsMyM49uL6aV44QorE9emBvRjxyurUdJVM4yV97JxLheIP3GkBMZwQ6quhLzD2JbNYMWE+/WSl88w== X-Received: by 2002:ac2:58ec:0:b0:49f:ba48:4e23 with SMTP id v12-20020ac258ec000000b0049fba484e23mr1058893lfo.218.1664443309105; Thu, 29 Sep 2022 02:21:49 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id c22-20020a2e9496000000b0026c687f9f7bsm633271ljh.107.2022.09.29.02.21.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Sep 2022 02:21:48 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 04/11] clk: qcom: gcc-msm8974: move clock parent tables down Date: Thu, 29 Sep 2022 12:21:38 +0300 Message-Id: <20220929092145.473009-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220929092145.473009-1-dmitry.baryshkov@linaro.org> References: <20220929092145.473009-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Rearrage clock parent tables and PLL declarataions (pull parents down and gpll4 up), so that we can use pll hw clock fields in the next commit. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong --- drivers/clk/qcom/gcc-msm8974.c | 98 +++++++++++++++++----------------- 1 file changed, 49 insertions(+), 49 deletions(-) diff --git a/drivers/clk/qcom/gcc-msm8974.c b/drivers/clk/qcom/gcc-msm8974.c index b847ce852ef8..77f3497265a0 100644 --- a/drivers/clk/qcom/gcc-msm8974.c +++ b/drivers/clk/qcom/gcc-msm8974.c @@ -32,28 +32,6 @@ enum { P_GPLL4, }; -static const struct parent_map gcc_xo_gpll0_map[] = { - { P_XO, 0 }, - { P_GPLL0, 1 } -}; - -static const char * const gcc_xo_gpll0[] = { - "xo", - "gpll0_vote", -}; - -static const struct parent_map gcc_xo_gpll0_gpll4_map[] = { - { P_XO, 0 }, - { P_GPLL0, 1 }, - { P_GPLL4, 5 } -}; - -static const char * const gcc_xo_gpll0_gpll4[] = { - "xo", - "gpll0_vote", - "gpll4_vote", -}; - static struct clk_pll gpll0 = { .l_reg = 0x0004, .m_reg = 0x0008, @@ -81,6 +59,55 @@ static struct clk_regmap gpll0_vote = { }, }; +static struct clk_pll gpll4 = { + .l_reg = 0x1dc4, + .m_reg = 0x1dc8, + .n_reg = 0x1dcc, + .config_reg = 0x1dd4, + .mode_reg = 0x1dc0, + .status_reg = 0x1ddc, + .status_bit = 17, + .clkr.hw.init = &(struct clk_init_data){ + .name = "gpll4", + .parent_names = (const char *[]){ "xo" }, + .num_parents = 1, + .ops = &clk_pll_ops, + }, +}; + +static struct clk_regmap gpll4_vote = { + .enable_reg = 0x1480, + .enable_mask = BIT(4), + .hw.init = &(struct clk_init_data){ + .name = "gpll4_vote", + .parent_names = (const char *[]){ "gpll4" }, + .num_parents = 1, + .ops = &clk_pll_vote_ops, + }, +}; + +static const struct parent_map gcc_xo_gpll0_map[] = { + { P_XO, 0 }, + { P_GPLL0, 1 } +}; + +static const char * const gcc_xo_gpll0[] = { + "xo", + "gpll0_vote", +}; + +static const struct parent_map gcc_xo_gpll0_gpll4_map[] = { + { P_XO, 0 }, + { P_GPLL0, 1 }, + { P_GPLL4, 5 } +}; + +static const char * const gcc_xo_gpll0_gpll4[] = { + "xo", + "gpll0_vote", + "gpll4_vote", +}; + static struct clk_rcg2 config_noc_clk_src = { .cmd_rcgr = 0x0150, .hid_width = 5, @@ -144,33 +171,6 @@ static struct clk_regmap gpll1_vote = { }, }; -static struct clk_pll gpll4 = { - .l_reg = 0x1dc4, - .m_reg = 0x1dc8, - .n_reg = 0x1dcc, - .config_reg = 0x1dd4, - .mode_reg = 0x1dc0, - .status_reg = 0x1ddc, - .status_bit = 17, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll4", - .parent_names = (const char *[]){ "xo" }, - .num_parents = 1, - .ops = &clk_pll_ops, - }, -}; - -static struct clk_regmap gpll4_vote = { - .enable_reg = 0x1480, - .enable_mask = BIT(4), - .hw.init = &(struct clk_init_data){ - .name = "gpll4_vote", - .parent_names = (const char *[]){ "gpll4" }, - .num_parents = 1, - .ops = &clk_pll_vote_ops, - }, -}; - static const struct freq_tbl ftbl_gcc_usb30_master_clk[] = { F(125000000, P_GPLL0, 1, 5, 24), { }