diff mbox series

clk: gcc-sc8280xp: use retention for USB power domains

Message ID 20220929161124.18138-1-johan+linaro@kernel.org (mailing list archive)
State Awaiting Upstream, archived
Headers show
Series clk: gcc-sc8280xp: use retention for USB power domains | expand

Commit Message

Johan Hovold Sept. 29, 2022, 4:11 p.m. UTC
Since commit d399723950c4 ("clk: qcom: gdsc: Fix the handling of
PWRSTS_RET support) retention mode can be used on sc8280xp to maintain
state during suspend instead of leaving the domain always on.

This is needed to eventually allow the parent CX domain to be powered
down during suspend.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
 drivers/clk/qcom/gcc-sc8280xp.c | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

While we're not yet able to fully test this (since we're not hitting CX
power down) this can still go in as we'll need it in some form
eventually.

Note that the PCIe domains should remain always-on until we have driver
support for suspend in place.

Johan

Comments

Bjorn Andersson Sept. 29, 2022, 4:45 p.m. UTC | #1
On Thu, 29 Sep 2022 18:11:24 +0200, Johan Hovold wrote:
> Since commit d399723950c4 ("clk: qcom: gdsc: Fix the handling of
> PWRSTS_RET support) retention mode can be used on sc8280xp to maintain
> state during suspend instead of leaving the domain always on.
> 
> This is needed to eventually allow the parent CX domain to be powered
> down during suspend.
> 
> [...]

Applied, thanks!

[1/1] clk: gcc-sc8280xp: use retention for USB power domains
      commit: 27da533af9b050e751a419c743096d06017daf0e

Best regards,
Konrad Dybcio Sept. 29, 2022, 11:38 p.m. UTC | #2
On 29.09.2022 18:11, Johan Hovold wrote:
> Since commit d399723950c4 ("clk: qcom: gdsc: Fix the handling of
> PWRSTS_RET support) retention mode can be used on sc8280xp to maintain
> state during suspend instead of leaving the domain always on.
> 
> This is needed to eventually allow the parent CX domain to be powered
> down during suspend.
> 
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>

Konrad
>  drivers/clk/qcom/gcc-sc8280xp.c | 13 +++----------
>  1 file changed, 3 insertions(+), 10 deletions(-)
> 
> While we're not yet able to fully test this (since we're not hitting CX
> power down) this can still go in as we'll need it in some form
> eventually.
> 
> Note that the PCIe domains should remain always-on until we have driver
> support for suspend in place.
> 
> Johan
> 
> 
> diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
> index 7768e6901dcc..a18ed88f3b82 100644
> --- a/drivers/clk/qcom/gcc-sc8280xp.c
> +++ b/drivers/clk/qcom/gcc-sc8280xp.c
> @@ -6843,17 +6843,12 @@ static struct gdsc ufs_phy_gdsc = {
>  	.pwrsts = PWRSTS_OFF_ON,
>  };
>  
> -/*
> - * The Qualcomm DWC3 driver suspend implementation appears to be incomplete
> - * for sc8280xp so keep the USB power domains always-on for now.
> - */
>  static struct gdsc usb30_mp_gdsc = {
>  	.gdscr = 0xab004,
>  	.pd = {
>  		.name = "usb30_mp_gdsc",
>  	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = ALWAYS_ON,
> +	.pwrsts = PWRSTS_RET_ON,
>  };
>  
>  static struct gdsc usb30_prim_gdsc = {
> @@ -6861,8 +6856,7 @@ static struct gdsc usb30_prim_gdsc = {
>  	.pd = {
>  		.name = "usb30_prim_gdsc",
>  	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = ALWAYS_ON,
> +	.pwrsts = PWRSTS_RET_ON,
>  };
>  
>  static struct gdsc usb30_sec_gdsc = {
> @@ -6870,8 +6864,7 @@ static struct gdsc usb30_sec_gdsc = {
>  	.pd = {
>  		.name = "usb30_sec_gdsc",
>  	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = ALWAYS_ON,
> +	.pwrsts = PWRSTS_RET_ON,
>  };
>  
>  static struct clk_regmap *gcc_sc8280xp_clocks[] = {
Rajendra Nayak Sept. 30, 2022, 11:57 a.m. UTC | #3
On 9/29/2022 9:41 PM, Johan Hovold wrote:
> Since commit d399723950c4 ("clk: qcom: gdsc: Fix the handling of
> PWRSTS_RET support) retention mode can be used on sc8280xp to maintain
> state during suspend instead of leaving the domain always on.
> 
> This is needed to eventually allow the parent CX domain to be powered
> down during suspend.
> 
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
>   drivers/clk/qcom/gcc-sc8280xp.c | 13 +++----------
>   1 file changed, 3 insertions(+), 10 deletions(-)
> 
> While we're not yet able to fully test this (since we're not hitting CX
> power down) this can still go in as we'll need it in some form
> eventually.

If sc8280xp supports CX power down, it would be good to also put in the
cxcs offsets so USB RET still works even when you do hit CX power down some
time in the future.

> 
> Note that the PCIe domains should remain always-on until we have driver
> support for suspend in place.
> 
> Johan
> 
> 
> diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
> index 7768e6901dcc..a18ed88f3b82 100644
> --- a/drivers/clk/qcom/gcc-sc8280xp.c
> +++ b/drivers/clk/qcom/gcc-sc8280xp.c
> @@ -6843,17 +6843,12 @@ static struct gdsc ufs_phy_gdsc = {
>   	.pwrsts = PWRSTS_OFF_ON,
>   };
>   
> -/*
> - * The Qualcomm DWC3 driver suspend implementation appears to be incomplete
> - * for sc8280xp so keep the USB power domains always-on for now.
> - */
>   static struct gdsc usb30_mp_gdsc = {
>   	.gdscr = 0xab004,
>   	.pd = {
>   		.name = "usb30_mp_gdsc",
>   	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = ALWAYS_ON,
> +	.pwrsts = PWRSTS_RET_ON,
>   };
>   
>   static struct gdsc usb30_prim_gdsc = {
> @@ -6861,8 +6856,7 @@ static struct gdsc usb30_prim_gdsc = {
>   	.pd = {
>   		.name = "usb30_prim_gdsc",
>   	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = ALWAYS_ON,
> +	.pwrsts = PWRSTS_RET_ON,
>   };
>   
>   static struct gdsc usb30_sec_gdsc = {
> @@ -6870,8 +6864,7 @@ static struct gdsc usb30_sec_gdsc = {
>   	.pd = {
>   		.name = "usb30_sec_gdsc",
>   	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = ALWAYS_ON,
> +	.pwrsts = PWRSTS_RET_ON,
>   };
>   
>   static struct clk_regmap *gcc_sc8280xp_clocks[] = {
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
index 7768e6901dcc..a18ed88f3b82 100644
--- a/drivers/clk/qcom/gcc-sc8280xp.c
+++ b/drivers/clk/qcom/gcc-sc8280xp.c
@@ -6843,17 +6843,12 @@  static struct gdsc ufs_phy_gdsc = {
 	.pwrsts = PWRSTS_OFF_ON,
 };
 
-/*
- * The Qualcomm DWC3 driver suspend implementation appears to be incomplete
- * for sc8280xp so keep the USB power domains always-on for now.
- */
 static struct gdsc usb30_mp_gdsc = {
 	.gdscr = 0xab004,
 	.pd = {
 		.name = "usb30_mp_gdsc",
 	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = ALWAYS_ON,
+	.pwrsts = PWRSTS_RET_ON,
 };
 
 static struct gdsc usb30_prim_gdsc = {
@@ -6861,8 +6856,7 @@  static struct gdsc usb30_prim_gdsc = {
 	.pd = {
 		.name = "usb30_prim_gdsc",
 	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = ALWAYS_ON,
+	.pwrsts = PWRSTS_RET_ON,
 };
 
 static struct gdsc usb30_sec_gdsc = {
@@ -6870,8 +6864,7 @@  static struct gdsc usb30_sec_gdsc = {
 	.pd = {
 		.name = "usb30_sec_gdsc",
 	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = ALWAYS_ON,
+	.pwrsts = PWRSTS_RET_ON,
 };
 
 static struct clk_regmap *gcc_sc8280xp_clocks[] = {