Message ID | 20221018-clk-range-checks-fixes-v4-37-971d5077e7d2@cerno.tech (mailing list archive) |
---|---|
State | Accepted, archived |
Headers | show
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Fri, 5 May 2023 07:27:34 -0400 (EDT) From: Maxime Ripard <maxime@cerno.tech> Date: Fri, 05 May 2023 13:25:39 +0200 Subject: [PATCH v4 37/68] clk: ux500: prcmu: Add a determine_rate hook MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20221018-clk-range-checks-fixes-v4-37-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org> Cc: linux-clk@vger.kernel.org, Maxime Ripard <maxime@cerno.tech>, Ulf Hansson <ulf.hansson@linaro.org>, linux-arm-kernel@lists.infradead.org, Linus Walleij <linus.walleij@linaro.org> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2131; i=maxime@cerno.tech; h=from:subject:message-id; bh=5jUOzNr8PQIXZ87KetW9sv83ouSz4FWuJF/pholzMmE=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5eciJq1eqab77P9e3NOy89I3fRfTaGZab3xavUvunn8 C02PdpSyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAiWrKMDBOMumrkgwUPFKU4KUvMOh U6vXDt07dLBD4yJYTeSje6OIORoe8F42Vb96e9UW4lj8/+suE0N17Lz542/7b6gZw7xo5buQE= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: <linux-clk.vger.kernel.org> X-Mailing-List: linux-clk@vger.kernel.org |
Series |
clk: Make determine_rate mandatory for muxes
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expand
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diff --git a/drivers/clk/ux500/clk-prcmu.c b/drivers/clk/ux500/clk-prcmu.c index 4deb37f19a7c..5cbf24c94606 100644 --- a/drivers/clk/ux500/clk-prcmu.c +++ b/drivers/clk/ux500/clk-prcmu.c @@ -344,6 +344,7 @@ static const struct clk_ops clk_prcmu_clkout_ops = { .prepare = clk_prcmu_clkout_prepare, .unprepare = clk_prcmu_clkout_unprepare, .recalc_rate = clk_prcmu_clkout_recalc_rate, + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = clk_prcmu_clkout_get_parent, .set_parent = clk_prcmu_clkout_set_parent, };