diff mbox series

[v2,2/9] dt-bindings: clock: Add SM8550 TCSR CC clocks

Message ID 20221123142009.594781-3-abel.vesa@linaro.org (mailing list archive)
State Superseded, archived
Headers show
Series clk: qcom: Add support for SM8550 | expand

Commit Message

Abel Vesa Nov. 23, 2022, 2:20 p.m. UTC
Add bindings documentation for clock TCSR driver on SM8550.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---

Changes since v1:
 * based on recent bindings, like Krzysztof asked
 * used qcom,gcc.yaml and dropped redundant properties
 * used additionalProperties instead unevaluatedProperties
 * renamed qcom,tcsrcc-sm8550.h to qcom,sm8550-tcsrcc.h, to match
   compatible
 * added dual lincese to qcom,sm8550-tcsrcc.h
 * moved patch to the beginning of patchset
 * dropped redundant "bindings" from subject line

 .../bindings/clock/qcom,sm8550-tcsrcc.yaml    | 39 +++++++++++++++++++
 .../dt-bindings/clock/qcom,sm8550-tcsrcc.h    | 18 +++++++++
 2 files changed, 57 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
 create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsrcc.h

Comments

Rob Herring Nov. 23, 2022, 9:17 p.m. UTC | #1
On Wed, 23 Nov 2022 16:20:02 +0200, Abel Vesa wrote:
> Add bindings documentation for clock TCSR driver on SM8550.
> 
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> 
> Changes since v1:
>  * based on recent bindings, like Krzysztof asked
>  * used qcom,gcc.yaml and dropped redundant properties
>  * used additionalProperties instead unevaluatedProperties
>  * renamed qcom,tcsrcc-sm8550.h to qcom,sm8550-tcsrcc.h, to match
>    compatible
>  * added dual lincese to qcom,sm8550-tcsrcc.h
>  * moved patch to the beginning of patchset
>  * dropped redundant "bindings" from subject line
> 
>  .../bindings/clock/qcom,sm8550-tcsrcc.yaml    | 39 +++++++++++++++++++
>  .../dt-bindings/clock/qcom,sm8550-tcsrcc.h    | 18 +++++++++
>  2 files changed, 57 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
>  create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml: allOf:0: '$ref qcom,gcc.yaml#' is not of type 'object', 'boolean'
	from schema $id: http://json-schema.org/draft-07/schema#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml: ignoring, error in schema: allOf: 0
Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.example.dtb:0:0: /example-0/clock-controller@1fc0000: failed to match any schema with compatible: ['qcom,sm8550-tcsrcc']

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20221123142009.594781-3-abel.vesa@linaro.org

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command.
Krzysztof Kozlowski Nov. 24, 2022, 11:51 a.m. UTC | #2
On 23/11/2022 15:20, Abel Vesa wrote:
> Add bindings documentation for clock TCSR driver on SM8550.
> 
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> 
> Changes since v1:
>  * based on recent bindings, like Krzysztof asked
>  * used qcom,gcc.yaml and dropped redundant properties
>  * used additionalProperties instead unevaluatedProperties
>  * renamed qcom,tcsrcc-sm8550.h to qcom,sm8550-tcsrcc.h, to match
>    compatible
>  * added dual lincese to qcom,sm8550-tcsrcc.h
>  * moved patch to the beginning of patchset
>  * dropped redundant "bindings" from subject line
> 
>  .../bindings/clock/qcom,sm8550-tcsrcc.yaml    | 39 +++++++++++++++++++
>  .../dt-bindings/clock/qcom,sm8550-tcsrcc.h    | 18 +++++++++
>  2 files changed, 57 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
>  create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
> new file mode 100644
> index 000000000000..a4531a7cad8c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
> @@ -0,0 +1,39 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsrcc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm TCSR Clock Controller on SM8550
> +
> +maintainers:
> +  - Bjorn Andersson <andersson@kernel.org>
> +
> +description: |
> +  Qualcomm TCSR clock control module provides the clocks, resets and
> +  power domains on SM8550
> +
> +  See also:: include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
> +
> +allOf:
> +  - $ref qcom,gcc.yaml#

I am not sure if this is similar block as GCC (or how similar). This
wasn't here previously. There is also a typo (missing :), so bindings
were not tested. :)

> +
> +properties:
> +  compatible:
> +    const: qcom,sm8550-tcsrcc
> +
> +required:
> +  - compatible
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    clock-controller@1fc0000 {
> +      compatible = "qcom,sm8550-tcsrcc";
> +      reg = <0x1fc0000 0x30000>;
> +      #clock-cells = <1>;
> +      #reset-cells = <1>;
> +    };
> +
> +...
> diff --git a/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
> new file mode 100644
> index 000000000000..4ce98ffc43ce
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) 2022, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2022, Linaro Limited
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
> +#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
> +
> +/* GCC clocks */

And these are TCSR CC clocks :)


Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
new file mode 100644
index 000000000000..a4531a7cad8c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
@@ -0,0 +1,39 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsrcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm TCSR Clock Controller on SM8550
+
+maintainers:
+  - Bjorn Andersson <andersson@kernel.org>
+
+description: |
+  Qualcomm TCSR clock control module provides the clocks, resets and
+  power domains on SM8550
+
+  See also:: include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
+
+allOf:
+  - $ref qcom,gcc.yaml#
+
+properties:
+  compatible:
+    const: qcom,sm8550-tcsrcc
+
+required:
+  - compatible
+
+additionalProperties: false
+
+examples:
+  - |
+    clock-controller@1fc0000 {
+      compatible = "qcom,sm8550-tcsrcc";
+      reg = <0x1fc0000 0x30000>;
+      #clock-cells = <1>;
+      #reset-cells = <1>;
+    };
+
+...
diff --git a/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
new file mode 100644
index 000000000000..4ce98ffc43ce
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
@@ -0,0 +1,18 @@ 
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2022, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
+#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
+
+/* GCC clocks */
+#define TCSR_PCIE_0_CLKREF_EN					0
+#define TCSR_PCIE_1_CLKREF_EN					1
+#define TCSR_UFS_CLKREF_EN					2
+#define TCSR_UFS_PAD_CLKREF_EN					3
+#define TCSR_USB2_CLKREF_EN					4
+#define TCSR_USB3_CLKREF_EN					5
+
+#endif