@@ -6,6 +6,7 @@
* - 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ
* Currently supported:
* - 9FGV0241
+ * - 9FGV0441
*
* Copyright (C) 2022 Marek Vasut <marex@denx.de>
*/
@@ -51,6 +52,7 @@
/* Supported Renesas 9-series models. */
enum rs9_model {
RENESAS_9FGV0241,
+ RENESAS_9FGV0441,
};
/* Structure to describe features of a particular 9-series model */
@@ -66,7 +68,7 @@ struct rs9_driver_data {
struct regmap *regmap;
const struct rs9_chip_info *chip_info;
struct clk *pin_xin;
- struct clk_hw *clk_dif[2];
+ struct clk_hw *clk_dif[4];
u8 pll_amplitude;
u8 pll_ssc;
u8 clk_dif_sr;
@@ -162,6 +164,11 @@ static u8 rs9fgv0241_calc_dif(int idx)
return BIT(idx) + 1;
}
+static u8 rs9fgv0441_calc_dif(int idx)
+{
+ return BIT(idx);
+}
+
static int rs9_get_output_config(struct rs9_driver_data *rs9, int idx)
{
u8 dif = rs9->chip_info->calc_dif(idx);
@@ -378,14 +385,23 @@ static const struct rs9_chip_info renesas_9fgv0241_info = {
.calc_dif = rs9fgv0241_calc_dif,
};
+static const struct rs9_chip_info renesas_9fgv0441_info = {
+ .model = RENESAS_9FGV0441,
+ .num_clks = 4,
+ .did = RS9_REG_DID_TYPE_FGV | 0x04,
+ .calc_dif = rs9fgv0441_calc_dif,
+};
+
static const struct i2c_device_id rs9_id[] = {
{ "9fgv0241", .driver_data = RENESAS_9FGV0241 },
+ { "9fgv0441", .driver_data = RENESAS_9FGV0441 },
{ }
};
MODULE_DEVICE_TABLE(i2c, rs9_id);
static const struct of_device_id clk_rs9_of_match[] = {
{ .compatible = "renesas,9fgv0241", .data = &renesas_9fgv0241_info },
+ { .compatible = "renesas,9fgv0441", .data = &renesas_9fgv0441_info },
{ }
};
MODULE_DEVICE_TABLE(of, clk_rs9_of_match);
This model is similar to 9FGV0241, but the DIFx bits start at bit 0. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> --- drivers/clk/clk-renesas-pcie.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-)