@@ -4,8 +4,6 @@
*/
#include <linux/irqchip.h>
#include <linux/mfd/syscon.h>
-#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
-#include <linux/micrel_phy.h>
#include <linux/of_platform.h>
#include <linux/phy.h>
#include <linux/regmap.h>
@@ -16,30 +14,12 @@
#include "cpuidle.h"
#include "hardware.h"
-static void __init imx6ul_enet_clk_init(void)
-{
- struct regmap *gpr;
-
- gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
- if (!IS_ERR(gpr))
- regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR,
- IMX6UL_GPR1_ENET_CLK_OUTPUT);
- else
- pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
-}
-
-static inline void imx6ul_enet_init(void)
-{
- imx6ul_enet_clk_init();
-}
-
static void __init imx6ul_init_machine(void)
{
imx_print_silicon_rev(cpu_is_imx6ull() ? "i.MX6ULL" : "i.MX6UL",
imx_get_soc_revision());
of_platform_default_populate(NULL, NULL, NULL);
- imx6ul_enet_init();
imx_anatop_init();
imx6ul_pm_init();
}
Ethernet refclock direction is board specific and should be configurable by devicetree. In fact there are board not working with this defaults, which will be fixed by separate patch. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> --- arch/arm/mach-imx/mach-imx6ul.c | 20 -------------------- 1 file changed, 20 deletions(-)