| Message ID | 20230201183626.351211-5-konrad.dybcio@linaro.org (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | [v5,01/10] clk: qcom: branch: Add helper functions for setting retain bits | expand |
Hi Konrad,
I love your patch! Yet something to improve:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on linus/master v6.2-rc6]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Konrad-Dybcio/clk-qcom-branch-Add-helper-functions-for-setting-SLEEP-WAKE-bits/20230202-033712
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link: https://lore.kernel.org/r/20230201183626.351211-5-konrad.dybcio%40linaro.org
patch subject: [PATCH v5 04/10] clk: qcom: branch: Clean up branch enable registers
config: arm-randconfig-r013-20230204 (https://download.01.org/0day-ci/archive/20230204/202302042015.l7uhyaz9-lkp@intel.com/config)
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 4196ca3278f78c6e19246e54ab0ecb364e37d66a)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/intel-lab-lkp/linux/commit/07999d2b9b99df1dc626354c217da075c5c565cb
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Konrad-Dybcio/clk-qcom-branch-Add-helper-functions-for-setting-SLEEP-WAKE-bits/20230202-033712
git checkout 07999d2b9b99df1dc626354c217da075c5c565cb
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/clk/qcom/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from drivers/clk/qcom/clk-branch.c:14:
drivers/clk/qcom/clk-branch.h:74:7: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
FIELD_PREP(CBCR_WAKEUP, val));
^
drivers/clk/qcom/clk-branch.h:80:7: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
FIELD_PREP(CBCR_SLEEP, val));
^
>> drivers/clk/qcom/clk-branch.c:55:4: error: call to undeclared function 'FIELD_GET'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
FIELD_GET(CBCR_NOC_FSM_STATUS, val) == FSM_STATUS_ON;
^
3 errors generated.
vim +/FIELD_GET +55 drivers/clk/qcom/clk-branch.c
41
42 static bool clk_branch2_check_halt(const struct clk_branch *br, bool enabling)
43 {
44 u32 val;
45 u32 mask;
46
47 mask = CBCR_NOC_FSM_STATUS;
48 mask |= CBCR_CLK_OFF;
49
50 regmap_read(br->clkr.regmap, br->halt_reg, &val);
51
52 if (enabling) {
53 val &= mask;
54 return (val & CBCR_CLK_OFF) == 0 ||
> 55 FIELD_GET(CBCR_NOC_FSM_STATUS, val) == FSM_STATUS_ON;
56 } else {
57 return val & CBCR_CLK_OFF;
58 }
59 }
60
diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c index f2b577b07b7e..ca896ebf7e1b 100644 --- a/drivers/clk/qcom/clk-branch.c +++ b/drivers/clk/qcom/clk-branch.c @@ -44,17 +44,17 @@ static bool clk_branch2_check_halt(const struct clk_branch *br, bool enabling) u32 val; u32 mask; - mask = BRANCH_NOC_FSM_STATUS_MASK << BRANCH_NOC_FSM_STATUS_SHIFT; - mask |= BRANCH_CLK_OFF; + mask = CBCR_NOC_FSM_STATUS; + mask |= CBCR_CLK_OFF; regmap_read(br->clkr.regmap, br->halt_reg, &val); if (enabling) { val &= mask; - return (val & BRANCH_CLK_OFF) == 0 || - val == BRANCH_NOC_FSM_STATUS_ON; + return (val & CBCR_CLK_OFF) == 0 || + FIELD_GET(CBCR_NOC_FSM_STATUS, val) == FSM_STATUS_ON; } else { - return val & BRANCH_CLK_OFF; + return val & CBCR_CLK_OFF; } } diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h index cff9ed6653b8..43cd41947ef5 100644 --- a/drivers/clk/qcom/clk-branch.h +++ b/drivers/clk/qcom/clk-branch.h @@ -38,10 +38,9 @@ struct clk_branch { }; /* Branch clock common bits for HLOS-owned clocks */ -#define BRANCH_CLK_OFF BIT(31) -#define BRANCH_NOC_FSM_STATUS_SHIFT 28 -#define BRANCH_NOC_FSM_STATUS_MASK 0x7 -#define BRANCH_NOC_FSM_STATUS_ON (0x2 << BRANCH_NOC_FSM_STATUS_SHIFT) +#define CBCR_CLK_OFF BIT(31) +#define CBCR_NOC_FSM_STATUS GENMASK(30, 28) + #define FSM_STATUS_ON BIT(1) #define CBCR_FORCE_MEM_CORE_ON BIT(14) #define CBCR_FORCE_MEM_PERIPH_ON BIT(13) #define CBCR_FORCE_MEM_PERIPH_OFF BIT(12)
Prefix the "branch enable" registers with CBCR_ to be closer to what they are actually called in Qualcomm terms, use GENMASK instead of shifting values around and adjust their usage accordingly. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- v4 -> v5: - New patch drivers/clk/qcom/clk-branch.c | 10 +++++----- drivers/clk/qcom/clk-branch.h | 7 +++---- 2 files changed, 8 insertions(+), 9 deletions(-)