| Message ID | 20230319132120.6347-2-aford173@gmail.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | clk: imx: Improve imx8mm/imx8mn LCDIF clocks | expand |
On 3/19/2023 9:21 PM, Adam Ford wrote: > Similar to imx/clk-composite-93 and imx/clk-divider-gate, the > imx8m_clk_composite_divider_ops can support determine_rate. > Without this the parent clocks are set to a fixed value, and > if a consumer needs a slower reate, the clock is divided, but > the division is only as good as the parent clock rate. > > With this added, the system can attempt to adjust the parent rate > if the proper flags are set which can lead to a more precise clock > value. > > Signed-off-by: Adam Ford <aford173@gmail.com> > > diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c > index cbf0d7955a00..3b63e47f088f 100644 > --- a/drivers/clk/imx/clk-composite-8m.c > +++ b/drivers/clk/imx/clk-composite-8m.c > @@ -119,10 +119,17 @@ static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw, > return ret; > } > > +static int clk_divider_determine_rate(struct clk_hw *hw, > + struct clk_rate_request *req) > +{ > + return clk_divider_ops.determine_rate(hw, req); > +} > + > static const struct clk_ops imx8m_clk_composite_divider_ops = { > .recalc_rate = imx8m_clk_composite_divider_recalc_rate, > .round_rate = imx8m_clk_composite_divider_round_rate, > .set_rate = imx8m_clk_composite_divider_set_rate, > + .determine_rate = clk_divider_determine_rate, Please align the name with imx8m_ as prefix. Other than that: Reviewed-by: Peng Fan <peng.fan@nxp.com> > }; > > static u8 imx8m_clk_composite_mux_get_parent(struct clk_hw *hw)
diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c index cbf0d7955a00..3b63e47f088f 100644 --- a/drivers/clk/imx/clk-composite-8m.c +++ b/drivers/clk/imx/clk-composite-8m.c @@ -119,10 +119,17 @@ static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw, return ret; } +static int clk_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + return clk_divider_ops.determine_rate(hw, req); +} + static const struct clk_ops imx8m_clk_composite_divider_ops = { .recalc_rate = imx8m_clk_composite_divider_recalc_rate, .round_rate = imx8m_clk_composite_divider_round_rate, .set_rate = imx8m_clk_composite_divider_set_rate, + .determine_rate = clk_divider_determine_rate, }; static u8 imx8m_clk_composite_mux_get_parent(struct clk_hw *hw)
Similar to imx/clk-composite-93 and imx/clk-divider-gate, the imx8m_clk_composite_divider_ops can support determine_rate. Without this the parent clocks are set to a fixed value, and if a consumer needs a slower reate, the clock is divided, but the division is only as good as the parent clock rate. With this added, the system can attempt to adjust the parent rate if the proper flags are set which can lead to a more precise clock value. Signed-off-by: Adam Ford <aford173@gmail.com>