| Message ID | 20230328033902.830269-1-nikita.yoush@cogentembedded.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | clk: renesas: r8a77980: Add i2c5 clock | expand |
On Tue, Mar 28, 2023 at 5:39 AM Nikita Yushchenko <nikita.yoush@cogentembedded.com> wrote: > The MSSR clock definition for i2c5 was missing. Add it. > > Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-clk-for-v6.4. Gr{oetje,eeting}s, Geert
diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c b/drivers/clk/renesas/r8a77980-cpg-mssr.c index 01ea09891b32..2f21a8725907 100644 --- a/drivers/clk/renesas/r8a77980-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c @@ -206,6 +206,7 @@ static const struct mssr_mod_clk r8a77980_mod_clks[] __initconst = { DEF_MOD("gpio0", 912, R8A77980_CLK_CP), DEF_MOD("can-fd", 914, R8A77980_CLK_S3D2), DEF_MOD("rpc-if", 917, R8A77980_CLK_RPCD2), + DEF_MOD("i2c5", 919, R8A77980_CLK_S0D6), DEF_MOD("i2c4", 927, R8A77980_CLK_S0D6), DEF_MOD("i2c3", 928, R8A77980_CLK_S0D6), DEF_MOD("i2c2", 929, R8A77980_CLK_S3D2),
The MSSR clock definition for i2c5 was missing. Add it. Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> --- drivers/clk/renesas/r8a77980-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+)