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Fri, 31 Mar 2023 07:11:38 +0000 From: "Peng Fan (OSS)" To: abelvesa@kernel.org, abel.vesa@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com Cc: linux-imx@nxp.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jacky Bai , Peng Fan Subject: [PATCH] clk: imx: composite-7ulp: Add some delay before deassert the reset Date: Fri, 31 Mar 2023 15:16:42 +0800 Message-Id: <20230331071642.2483199-1-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.37.1 X-ClientProxiedBy: SI2P153CA0003.APCP153.PROD.OUTLOOK.COM (2603:1096:4:140::20) To DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR04MB9417:EE_|DU2PR04MB8632:EE_ X-MS-Office365-Filtering-Correlation-Id: 8875b8c9-c8a2-4547-8e2e-08db31b72bd4 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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For peripherals like GPU that need sync reset, some delay is necessary befere & after release the reset to make sure the HW is reset into known status. So add some delay before & after release reset. This change will not impact i.MX7ULP function Reviewed-by: Peng Fan Signed-off-by: Jacky Bai Signed-off-by: Peng Fan --- drivers/clk/imx/clk-composite-7ulp.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/imx/clk-composite-7ulp.c b/drivers/clk/imx/clk-composite-7ulp.c index 4eedd45dbaa8..f9fe968bd900 100644 --- a/drivers/clk/imx/clk-composite-7ulp.c +++ b/drivers/clk/imx/clk-composite-7ulp.c @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -37,6 +38,9 @@ static int pcc_gate_enable(struct clk_hw *hw) if (ret) return ret; + /* wait before release reset */ + udelay(1); + spin_lock_irqsave(gate->lock, flags); /* * release the sw reset for peripherals associated with @@ -48,6 +52,9 @@ static int pcc_gate_enable(struct clk_hw *hw) spin_unlock_irqrestore(gate->lock, flags); + /* wait sync reset done */ + udelay(1); + return 0; }