From patchwork Tue Apr 11 17:43:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Yang X-Patchwork-Id: 13207989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72658C77B6F for ; Tue, 11 Apr 2023 17:45:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230170AbjDKRpY (ORCPT ); Tue, 11 Apr 2023 13:45:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230182AbjDKRpT (ORCPT ); Tue, 11 Apr 2023 13:45:19 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D4556A6D; Tue, 11 Apr 2023 10:45:04 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id 21so405784plg.12; Tue, 11 Apr 2023 10:45:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1681235103; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mWJIHJN97kYoJ38RctmRsN2DU2i8m+C9aLZTSJfRMII=; b=m0xcFadcDUGPeRhPvRSy+TWnjzCjsExoBpCVjlJAaCx5thu23eyfZP8geuiI0dThZZ LzuIgVpLhWzLVUGMJT0vb9iBlxWJqQZHrxVoXhLzWzeaDGYTkvxKJXl/QRgidF+saK5n oUWx+9GfFu8/pwc+dy9qNSbOjxxISlnI7J+yaX86uQC2a8wXtnMVDq1vUuQRHzz5V4Hq seC1mBPqk3E2QX+3FjKntSXHDZxUmnfo9Eaok5g8BfrK7PsKafve5BbEiEgP7UXCXEkd ZNLRP7W85kWuM8T7CxfMiGLyqmAj3nQU99NSVRBDpSb2XNccguSIGnrdNvFWXeYTILrx jrMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1681235103; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mWJIHJN97kYoJ38RctmRsN2DU2i8m+C9aLZTSJfRMII=; b=vKmANWSBhwhlU+Coj33G89GMfTK2/Chv8sFCNTBMOiKqXNNHMRD93bhdR9bPrmqnmM /pQulhUkofhTKFhig96CAJdBSlenrECb81QMkvHjBeWHjVVPr/H1Ef4bxkJ+OcMQstXp UASN6T9gd+pbgrDgcUck7Q6nFO0P6leu07SqP75xthn6Mpw4awSe0m66O/GnGCTGNgF+ w6sfJ1H0AEpbc4UYudKE5O4oyBI4KfZAcf6j1hXBCTIMFVsjsEGRsiiluKaTOZjOUsNi 060GEdRGAMEmlZ7Mih/m4HM3XG3trfU6QCxMytVKiKzSkeyUZ4mcT99PlMfwy4li5BIJ nnCQ== X-Gm-Message-State: AAQBX9fowm00uvL+a/DKgt241mk+yy7HHvuWJUuy6pZjqq4aL56slVBF z2x0VtWSMIYamIERAlQt3QnqS/6QX+QjUT6wfEs= X-Google-Smtp-Source: AKy350YYyVbk9wxTkYb6BqJAYWZR+AaxGf+qe+F0Jb9uHjbENVBioeS5cLSUCqEZvS+b5ep9vj/jsg== X-Received: by 2002:a17:902:e88a:b0:19e:675b:a40f with SMTP id w10-20020a170902e88a00b0019e675ba40fmr22806956plg.8.1681235103213; Tue, 11 Apr 2023 10:45:03 -0700 (PDT) Received: from d.home.yangfl.dn42 ([104.28.213.202]) by smtp.gmail.com with ESMTPSA id w23-20020a1709027b9700b001a655738a42sm1900805pll.172.2023.04.11.10.44.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Apr 2023 10:45:02 -0700 (PDT) From: David Yang To: linux-clk@vger.kernel.org Cc: David Yang , Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, Conor Dooley , Nick Alcock Subject: [PATCH v4 06/13] clk: hisilicon: hi3559a: Use helper functions Date: Wed, 12 Apr 2023 01:43:15 +0800 Message-Id: <20230411174329.424763-7-mmyangfl@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230411174329.424763-1-mmyangfl@gmail.com> References: <20230411174329.424763-1-mmyangfl@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Use common helper functions and register clks with a single of_device_id data. Signed-off-by: David Yang --- drivers/clk/hisilicon/clk-hi3559a.c | 232 +++++----------------------- 1 file changed, 37 insertions(+), 195 deletions(-) diff --git a/drivers/clk/hisilicon/clk-hi3559a.c b/drivers/clk/hisilicon/clk-hi3559a.c index 8036bd8cbb0a..9844e86ec146 100644 --- a/drivers/clk/hisilicon/clk-hi3559a.c +++ b/drivers/clk/hisilicon/clk-hi3559a.c @@ -11,7 +11,6 @@ #include #include #include -#include #include @@ -452,21 +451,23 @@ static const struct clk_ops hisi_clk_pll_ops = { .recalc_rate = clk_pll_recalc_rate, }; -static void hisi_clk_register_pll(struct hi3559av100_pll_clock *clks, - int nums, struct hisi_clock_data *data, struct device *dev) +static int +hisi_clk_register_pll(struct device *dev, const void *clocks, + size_t num, struct hisi_clock_data *data) { + const struct hi3559av100_pll_clock *clks = clocks; void __iomem *base = data->base; struct hi3559av100_clk_pll *p_clk = NULL; struct clk *clk = NULL; struct clk_init_data init; int i; - p_clk = devm_kzalloc(dev, sizeof(*p_clk) * nums, GFP_KERNEL); + p_clk = devm_kzalloc(dev, sizeof(*p_clk) * num, GFP_KERNEL); if (!p_clk) - return; + return -ENOMEM; - for (i = 0; i < nums; i++) { + for (i = 0; i < num; i++) { init.name = clks[i].name; init.flags = 0; init.parent_names = @@ -494,78 +495,27 @@ static void hisi_clk_register_pll(struct hi3559av100_pll_clock *clks, devm_kfree(dev, p_clk); dev_err(dev, "%s: failed to register clock %s\n", __func__, clks[i].name); - continue; + return PTR_ERR(clk); } data->clk_data.clks[clks[i].id] = clk; p_clk++; } -} - -static struct hisi_clock_data *hi3559av100_clk_register( - struct platform_device *pdev) -{ - struct hisi_clock_data *clk_data; - int ret; - - clk_data = hisi_clk_alloc(pdev, HI3559AV100_CRG_NR_CLKS); - if (!clk_data) - return ERR_PTR(-ENOMEM); - - ret = hisi_clk_register_fixed_rate(hi3559av100_fixed_rate_clks_crg, - ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), clk_data); - if (ret) - return ERR_PTR(ret); - - hisi_clk_register_pll(hi3559av100_pll_clks, - ARRAY_SIZE(hi3559av100_pll_clks), clk_data, &pdev->dev); - - ret = hisi_clk_register_mux(hi3559av100_mux_clks_crg, - ARRAY_SIZE(hi3559av100_mux_clks_crg), clk_data); - if (ret) - goto unregister_fixed_rate; - - ret = hisi_clk_register_gate(hi3559av100_gate_clks, - ARRAY_SIZE(hi3559av100_gate_clks), clk_data); - if (ret) - goto unregister_mux; - - ret = of_clk_add_provider(pdev->dev.of_node, - of_clk_src_onecell_get, &clk_data->clk_data); - if (ret) - goto unregister_gate; - - return clk_data; - -unregister_gate: - hisi_clk_unregister_gate(hi3559av100_gate_clks, - ARRAY_SIZE(hi3559av100_gate_clks), clk_data); -unregister_mux: - hisi_clk_unregister_mux(hi3559av100_mux_clks_crg, - ARRAY_SIZE(hi3559av100_mux_clks_crg), clk_data); -unregister_fixed_rate: - hisi_clk_unregister_fixed_rate(hi3559av100_fixed_rate_clks_crg, - ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), clk_data); - return ERR_PTR(ret); -} -static void hi3559av100_clk_unregister(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg = platform_get_drvdata(pdev); - - of_clk_del_provider(pdev->dev.of_node); - - hisi_clk_unregister_gate(hi3559av100_gate_clks, - ARRAY_SIZE(hi3559av100_gate_clks), crg->clk_data); - hisi_clk_unregister_mux(hi3559av100_mux_clks_crg, - ARRAY_SIZE(hi3559av100_mux_clks_crg), crg->clk_data); - hisi_clk_unregister_fixed_rate(hi3559av100_fixed_rate_clks_crg, - ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), crg->clk_data); + return 0; } -static const struct hisi_crg_funcs hi3559av100_crg_funcs = { - .register_clks = hi3559av100_clk_register, - .unregister_clks = hi3559av100_clk_unregister, +static const struct hisi_clocks hi3559av100_clks = { + .nr = HI3559AV100_CRG_NR_CLKS, + .fixed_rate_clks = hi3559av100_fixed_rate_clks_crg, + .fixed_rate_clks_num = ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), + .mux_clks = hi3559av100_mux_clks_crg, + .mux_clks_num = ARRAY_SIZE(hi3559av100_mux_clks_crg), + .gate_clks = hi3559av100_gate_clks, + .gate_clks_num = ARRAY_SIZE(hi3559av100_gate_clks), + .customized_clks = hi3559av100_pll_clks, + .customized_clks_num = ARRAY_SIZE(hi3559av100_pll_clks), + .clk_register_customized = hisi_clk_register_pll, }; static struct hisi_fixed_rate_clock hi3559av100_shub_fixed_rate_clks[] = { @@ -673,7 +623,7 @@ static struct hisi_gate_clock hi3559av100_shub_gate_clks[] = { }, }; -static int hi3559av100_shub_default_clk_set(void) +static int hi3559av100_shub_default_clk_set(struct device *dev, struct hisi_clock_data *data) { void __iomem *crg_base; unsigned int val; @@ -696,149 +646,41 @@ static int hi3559av100_shub_default_clk_set(void) return 0; } -static struct hisi_clock_data *hi3559av100_shub_clk_register( - struct platform_device *pdev) -{ - struct hisi_clock_data *clk_data = NULL; - int ret; - - hi3559av100_shub_default_clk_set(); - - clk_data = hisi_clk_alloc(pdev, HI3559AV100_SHUB_NR_CLKS); - if (!clk_data) - return ERR_PTR(-ENOMEM); - - ret = hisi_clk_register_fixed_rate(hi3559av100_shub_fixed_rate_clks, - ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), clk_data); - if (ret) - return ERR_PTR(ret); - - ret = hisi_clk_register_mux(hi3559av100_shub_mux_clks, - ARRAY_SIZE(hi3559av100_shub_mux_clks), clk_data); - if (ret) - goto unregister_fixed_rate; - - ret = hisi_clk_register_divider(hi3559av100_shub_div_clks, - ARRAY_SIZE(hi3559av100_shub_div_clks), clk_data); - if (ret) - goto unregister_mux; - - ret = hisi_clk_register_gate(hi3559av100_shub_gate_clks, - ARRAY_SIZE(hi3559av100_shub_gate_clks), clk_data); - if (ret) - goto unregister_factor; - - ret = of_clk_add_provider(pdev->dev.of_node, - of_clk_src_onecell_get, &clk_data->clk_data); - if (ret) - goto unregister_gate; - - return clk_data; - -unregister_gate: - hisi_clk_unregister_gate(hi3559av100_shub_gate_clks, - ARRAY_SIZE(hi3559av100_shub_gate_clks), clk_data); -unregister_factor: - hisi_clk_unregister_divider(hi3559av100_shub_div_clks, - ARRAY_SIZE(hi3559av100_shub_div_clks), clk_data); -unregister_mux: - hisi_clk_unregister_mux(hi3559av100_shub_mux_clks, - ARRAY_SIZE(hi3559av100_shub_mux_clks), clk_data); -unregister_fixed_rate: - hisi_clk_unregister_fixed_rate(hi3559av100_shub_fixed_rate_clks, - ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), clk_data); - return ERR_PTR(ret); -} - -static void hi3559av100_shub_clk_unregister(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg = platform_get_drvdata(pdev); - - of_clk_del_provider(pdev->dev.of_node); - - hisi_clk_unregister_gate(hi3559av100_shub_gate_clks, - ARRAY_SIZE(hi3559av100_shub_gate_clks), crg->clk_data); - hisi_clk_unregister_divider(hi3559av100_shub_div_clks, - ARRAY_SIZE(hi3559av100_shub_div_clks), crg->clk_data); - hisi_clk_unregister_mux(hi3559av100_shub_mux_clks, - ARRAY_SIZE(hi3559av100_shub_mux_clks), crg->clk_data); - hisi_clk_unregister_fixed_rate(hi3559av100_shub_fixed_rate_clks, - ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), crg->clk_data); -} - -static const struct hisi_crg_funcs hi3559av100_shub_crg_funcs = { - .register_clks = hi3559av100_shub_clk_register, - .unregister_clks = hi3559av100_shub_clk_unregister, +static const struct hisi_clocks hi3559av100_shub_clks = { + .nr = HI3559AV100_SHUB_NR_CLKS, + .prologue = hi3559av100_shub_default_clk_set, + .fixed_rate_clks = hi3559av100_shub_fixed_rate_clks, + .fixed_rate_clks_num = ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), + .mux_clks = hi3559av100_shub_mux_clks, + .mux_clks_num = ARRAY_SIZE(hi3559av100_shub_mux_clks), + .divider_clks = hi3559av100_shub_div_clks, + .divider_clks_num = ARRAY_SIZE(hi3559av100_shub_div_clks), + .gate_clks = hi3559av100_shub_gate_clks, + .gate_clks_num = ARRAY_SIZE(hi3559av100_shub_gate_clks), }; static const struct of_device_id hi3559av100_crg_match_table[] = { { .compatible = "hisilicon,hi3559av100-clock", - .data = &hi3559av100_crg_funcs + .data = &hi3559av100_clks }, { .compatible = "hisilicon,hi3559av100-shub-clock", - .data = &hi3559av100_shub_crg_funcs + .data = &hi3559av100_shub_clks }, { } }; MODULE_DEVICE_TABLE(of, hi3559av100_crg_match_table); -static int hi3559av100_crg_probe(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg; - - crg = devm_kmalloc(&pdev->dev, sizeof(*crg), GFP_KERNEL); - if (!crg) - return -ENOMEM; - - crg->funcs = of_device_get_match_data(&pdev->dev); - if (!crg->funcs) - return -ENOENT; - - crg->rstc = hisi_reset_init(pdev); - if (!crg->rstc) - return -ENOMEM; - - crg->clk_data = crg->funcs->register_clks(pdev); - if (IS_ERR(crg->clk_data)) { - hisi_reset_exit(crg->rstc); - return PTR_ERR(crg->clk_data); - } - - platform_set_drvdata(pdev, crg); - return 0; -} - -static int hi3559av100_crg_remove(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg = platform_get_drvdata(pdev); - - hisi_reset_exit(crg->rstc); - crg->funcs->unregister_clks(pdev); - return 0; -} - static struct platform_driver hi3559av100_crg_driver = { - .probe = hi3559av100_crg_probe, - .remove = hi3559av100_crg_remove, + .probe = hisi_crg_probe, + .remove = hisi_crg_remove, .driver = { .name = "hi3559av100-clock", .of_match_table = hi3559av100_crg_match_table, }, }; -static int __init hi3559av100_crg_init(void) -{ - return platform_driver_register(&hi3559av100_crg_driver); -} -core_initcall(hi3559av100_crg_init); - -static void __exit hi3559av100_crg_exit(void) -{ - platform_driver_unregister(&hi3559av100_crg_driver); -} -module_exit(hi3559av100_crg_exit); - +module_platform_driver(hi3559av100_crg_driver); MODULE_DESCRIPTION("HiSilicon Hi3559AV100 CRG Driver");