| Message ID | 20230423123828.1346511-1-aford173@gmail.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | Revert "clk: imx: composite-8m: Add support to determine_rate" | expand |
> Subject: [PATCH] Revert "clk: imx: composite-8m: Add support to > determine_rate" > > This reverts commit 156e96ff2172518b6f83e97d8f11f677bc668e22. > > This patch was found to cause some division issues on the i.MX8MP which > causes the video clocks to not properly divide when division was greate than > 8. This causes video failures on disp1_pix and disp2_pix clocks. > > Until a better solution is found, we'll have to revert this. > > Signed-off-by: Adam Ford <aford173@gmail.com> Indeed we already see issue in NXP local CI with the previous patch. Acked-by: Peng Fan <peng.fan@nxp.com> > > diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk- > composite-8m.c > index 6883a8199b6c..cbf0d7955a00 100644 > --- a/drivers/clk/imx/clk-composite-8m.c > +++ b/drivers/clk/imx/clk-composite-8m.c > @@ -119,17 +119,10 @@ static int > imx8m_clk_composite_divider_set_rate(struct clk_hw *hw, > return ret; > } > > -static int imx8m_clk_divider_determine_rate(struct clk_hw *hw, > - struct clk_rate_request *req) > -{ > - return clk_divider_ops.determine_rate(hw, req); > -} > - > static const struct clk_ops imx8m_clk_composite_divider_ops = { > .recalc_rate = imx8m_clk_composite_divider_recalc_rate, > .round_rate = imx8m_clk_composite_divider_round_rate, > .set_rate = imx8m_clk_composite_divider_set_rate, > - .determine_rate = imx8m_clk_divider_determine_rate, > }; > > static u8 imx8m_clk_composite_mux_get_parent(struct clk_hw *hw) > -- > 2.39.2
On Sun, Apr 23, 2023 at 8:43 PM Peng Fan <peng.fan@nxp.com> wrote: > > > Subject: [PATCH] Revert "clk: imx: composite-8m: Add support to > > determine_rate" > > > > This reverts commit 156e96ff2172518b6f83e97d8f11f677bc668e22. > > > > This patch was found to cause some division issues on the i.MX8MP which > > causes the video clocks to not properly divide when division was greate than > > 8. This causes video failures on disp1_pix and disp2_pix clocks. > > > > Until a better solution is found, we'll have to revert this. > > Abel / Stephen, Is there a way we can get this applied and put in for RC1? When I originally did this, I only tested with Nano and some brief testing with Mini, but it wasn't until I tested with Plus that I found issues. thanks adam > > Signed-off-by: Adam Ford <aford173@gmail.com> > > Indeed we already see issue in NXP local CI with the previous patch. > > Acked-by: Peng Fan <peng.fan@nxp.com> > > > > > diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk- > > composite-8m.c > > index 6883a8199b6c..cbf0d7955a00 100644 > > --- a/drivers/clk/imx/clk-composite-8m.c > > +++ b/drivers/clk/imx/clk-composite-8m.c > > @@ -119,17 +119,10 @@ static int > > imx8m_clk_composite_divider_set_rate(struct clk_hw *hw, > > return ret; > > } > > > > -static int imx8m_clk_divider_determine_rate(struct clk_hw *hw, > > - struct clk_rate_request *req) > > -{ > > - return clk_divider_ops.determine_rate(hw, req); > > -} > > - > > static const struct clk_ops imx8m_clk_composite_divider_ops = { > > .recalc_rate = imx8m_clk_composite_divider_recalc_rate, > > .round_rate = imx8m_clk_composite_divider_round_rate, > > .set_rate = imx8m_clk_composite_divider_set_rate, > > - .determine_rate = imx8m_clk_divider_determine_rate, > > }; > > > > static u8 imx8m_clk_composite_mux_get_parent(struct clk_hw *hw) > > -- > > 2.39.2 >
Quoting Adam Ford (2023-04-23 05:38:27) > This reverts commit 156e96ff2172518b6f83e97d8f11f677bc668e22. > > This patch was found to cause some division issues on the i.MX8MP > which causes the video clocks to not properly divide when division > was greate than 8. This causes video failures on disp1_pix and > disp2_pix clocks. > > Until a better solution is found, we'll have to revert this. > > Signed-off-by: Adam Ford <aford173@gmail.com> > > diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c > index 6883a8199b6c..cbf0d7955a00 100644 > --- a/drivers/clk/imx/clk-composite-8m.c Applied to clk-next
diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c index 6883a8199b6c..cbf0d7955a00 100644 --- a/drivers/clk/imx/clk-composite-8m.c +++ b/drivers/clk/imx/clk-composite-8m.c @@ -119,17 +119,10 @@ static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw, return ret; } -static int imx8m_clk_divider_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) -{ - return clk_divider_ops.determine_rate(hw, req); -} - static const struct clk_ops imx8m_clk_composite_divider_ops = { .recalc_rate = imx8m_clk_composite_divider_recalc_rate, .round_rate = imx8m_clk_composite_divider_round_rate, .set_rate = imx8m_clk_composite_divider_set_rate, - .determine_rate = imx8m_clk_divider_determine_rate, }; static u8 imx8m_clk_composite_mux_get_parent(struct clk_hw *hw)
This reverts commit 156e96ff2172518b6f83e97d8f11f677bc668e22. This patch was found to cause some division issues on the i.MX8MP which causes the video clocks to not properly divide when division was greate than 8. This causes video failures on disp1_pix and disp2_pix clocks. Until a better solution is found, we'll have to revert this. Signed-off-by: Adam Ford <aford173@gmail.com>