From patchwork Mon May 8 10:47:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13234309 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F4C2C77B75 for ; Mon, 8 May 2023 10:49:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235222AbjEHKtm (ORCPT ); Mon, 8 May 2023 06:49:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235125AbjEHKtU (ORCPT ); Mon, 8 May 2023 06:49:20 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E974D2FCF2; Mon, 8 May 2023 03:48:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1683542921; x=1715078921; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+uWE9bBrEsxXvxosuC1tPMiUqN2hS3oJSFdol+Ua8Fk=; b=BF1utP/+xXWa53WJl/75g82T2EqDNJx+sC2qHFTDwi1tmtlgFyK/cp8E c/dzIUYVqcFB8rK+2FchHqJuc/nIqdTwFbMDiymcBq0LkywEyG2YDI2U7 U+yLpcsH1AzMnewzUxPs9J2VW/u3acP8xbmUc9f9M/pxJtyKsLNa2ehgR ybiLwxvHy3KXah467Bc0EVx9YbK0ZmoEB1+tZWWDH/2En6KKk32C9ct0q 8iralok1QWKbYt7e9B4+9fWsZANnladrQka1CIO1qvxpH9Tkfq4N2huD7 /agY3MLPThMzLYADGakgV32uIuwmG+xw41oryoYJgVlonIUdTqHlxfKUi Q==; X-IronPort-AV: E=Sophos;i="5.99,258,1677567600"; d="scan'208";a="150872858" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 May 2023 03:48:37 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Mon, 8 May 2023 03:48:35 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Mon, 8 May 2023 03:48:31 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Subject: [PATCH v2 3/5] ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings Date: Mon, 8 May 2023 13:47:59 +0300 Message-ID: <20230508104801.445261-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230508104801.445261-1-claudiu.beznea@microchip.com> References: <20230508104801.445261-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Switch slow clock controller to new clock bindings. Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/at91sam9n12.dtsi | 23 +++-------------------- 1 file changed, 3 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index c2e7460fb7ff..0e28101b26bf 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -146,28 +146,11 @@ shdwc@fffffe10 { clocks = <&clk32k>; }; - sckc@fffffe50 { + clk32k: clock-controller@fffffe50 { compatible = "atmel,at91sam9x5-sckc"; reg = <0xfffffe50 0x4>; - - slow_osc: slow_osc { - compatible = "atmel,at91sam9x5-clk-slow-osc"; - #clock-cells = <0>; - clocks = <&slow_xtal>; - }; - - slow_rc_osc: slow_rc_osc { - compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-accuracy = <50000000>; - }; - - clk32k: slck { - compatible = "atmel,at91sam9x5-clk-slow"; - #clock-cells = <0>; - clocks = <&slow_rc_osc>, <&slow_osc>; - }; + clocks = <&slow_xtal>; + #clock-cells = <0>; }; mmc0: mmc@f0008000 {