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X-OriginatorOrg: topic.nl X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Aug 2023 06:41:21.8340 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 971c9e8b-6220-48fc-2a87-08db93237c22 X-MS-Exchange-CrossTenant-Id: 449607a5-3517-482d-8d16-41dd868cbda3 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=449607a5-3517-482d-8d16-41dd868cbda3;Ip=[20.93.157.195];Helo=[westeu11-emailsignatures-cloud.codetwo.com] X-MS-Exchange-CrossTenant-AuthSource: AM4PEPF00025F96.EURPRD83.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB8420 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The PLL1_PD pin (a.k.a. STATUS_LD1) can be used as SPI readback pin. Make this possible. Signed-off-by: Mike Looijmans Reviewed-by: Liam Beguin --- drivers/clk/clk-lmk04832.c | 23 ++++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk-lmk04832.c b/drivers/clk/clk-lmk04832.c index dd1f0c59ee71..99b271c1278a 100644 --- a/drivers/clk/clk-lmk04832.c +++ b/drivers/clk/clk-lmk04832.c @@ -134,6 +134,11 @@ /* 0x14b - 0x152 Holdover */ /* 0x153 - 0x15f PLL1 Configuration */ +#define LMK04832_REG_PLL1_LD 0x15f +#define LMK04832_BIT_PLL1_LD_MUX GENMASK(7, 3) +#define LMK04832_VAL_PLL1_LD_MUX_SPI_RDBK 0x07 +#define LMK04832_BIT_PLL1_LD_TYPE GENMASK(2, 0) +#define LMK04832_VAL_PLL1_LD_TYPE_OUT_PP 0x03 /* 0x160 - 0x16e PLL2 Configuration */ #define LMK04832_REG_PLL2_R_MSB 0x160 @@ -206,6 +211,7 @@ enum lmk04832_rdbk_type { RDBK_CLKIN_SEL0, RDBK_CLKIN_SEL1, RDBK_RESET, + RDBK_PLL1_LD, }; struct lmk_dclk { @@ -1346,6 +1352,10 @@ static int lmk04832_set_spi_rdbk(const struct lmk04832 *lmk, const int rdbk_pin) { int reg; int ret; + int val = FIELD_PREP(LMK04832_BIT_CLKIN_SEL_MUX, + LMK04832_VAL_CLKIN_SEL_MUX_SPI_RDBK) | + FIELD_PREP(LMK04832_BIT_CLKIN_SEL_TYPE, + LMK04832_VAL_CLKIN_SEL_TYPE_OUT); dev_info(lmk->dev, "setting up 4-wire mode\n"); ret = regmap_write(lmk->regmap, LMK04832_REG_RST3W, @@ -1363,15 +1373,18 @@ static int lmk04832_set_spi_rdbk(const struct lmk04832 *lmk, const int rdbk_pin) case RDBK_RESET: reg = LMK04832_REG_CLKIN_RST; break; + case RDBK_PLL1_LD: + reg = LMK04832_REG_PLL1_LD; + val = FIELD_PREP(LMK04832_BIT_PLL1_LD_MUX, + LMK04832_VAL_PLL1_LD_MUX_SPI_RDBK) | + FIELD_PREP(LMK04832_BIT_PLL1_LD_TYPE, + LMK04832_VAL_PLL1_LD_TYPE_OUT_PP); + break; default: return -EINVAL; } - return regmap_write(lmk->regmap, reg, - FIELD_PREP(LMK04832_BIT_CLKIN_SEL_MUX, - LMK04832_VAL_CLKIN_SEL_MUX_SPI_RDBK) | - FIELD_PREP(LMK04832_BIT_CLKIN_SEL_TYPE, - LMK04832_VAL_CLKIN_SEL_TYPE_OUT)); + return regmap_write(lmk->regmap, reg, val); } static int lmk04832_probe(struct spi_device *spi)