Message ID | 20230912-imx8-clk-v1-v1-2-69a34bcfcae1@nxp.com (mailing list archive) |
---|---|
State | Awaiting Upstream, archived |
Headers | show
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Tue, 12 Sep 2023 09:14:43 +0000 From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com> Date: Tue, 12 Sep 2023 17:19:00 +0800 Subject: [PATCH 2/7] clk: imx: imx8qxp: Fix elcdif_pll clock Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230912-imx8-clk-v1-v1-2-69a34bcfcae1@nxp.com> References: <20230912-imx8-clk-v1-v1-0-69a34bcfcae1@nxp.com> In-Reply-To: <20230912-imx8-clk-v1-v1-0-69a34bcfcae1@nxp.com> To: Abel Vesa <abelvesa@kernel.org>, Peng Fan <peng.fan@nxp.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, Jacky Bai <ping.bai@nxp.com>, Dong Aisheng <aisheng.dong@nxp.com> Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Robert Chiras <robert.chiras@nxp.com>, Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>, Laurentiu Palcu <laurentiu.palcu@nxp.com> X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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clk:imx: misc update/fix for i.MX8
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diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c index cadcbb318f5c..4020aa4b79bf 100644 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -147,10 +147,10 @@ static int imx8qxp_clk_probe(struct platform_device *pdev) imx_clk_scu("adc0_clk", IMX_SC_R_ADC_0, IMX_SC_PM_CLK_PER); imx_clk_scu("adc1_clk", IMX_SC_R_ADC_1, IMX_SC_PM_CLK_PER); imx_clk_scu("pwm_clk", IMX_SC_R_LCD_0_PWM_0, IMX_SC_PM_CLK_PER); + imx_clk_scu("elcdif_pll", IMX_SC_R_ELCDIF_PLL, IMX_SC_PM_CLK_PLL); imx_clk_scu2("lcd_clk", lcd_sels, ARRAY_SIZE(lcd_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_PER); imx_clk_scu2("lcd_pxl_clk", lcd_pxl_sels, ARRAY_SIZE(lcd_pxl_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_MISC0); imx_clk_scu("lcd_pxl_bypass_div_clk", IMX_SC_R_LCD_0, IMX_SC_PM_CLK_BYPASS); - imx_clk_scu("elcdif_pll", IMX_SC_R_ELCDIF_PLL, IMX_SC_PM_CLK_PLL); /* Audio SS */ imx_clk_scu("audio_pll0_clk", IMX_SC_R_AUDIO_PLL_0, IMX_SC_PM_CLK_PLL);