Message ID | 20231115142749.853106-6-claudiu.beznea.uj@bp.renesas.com (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | irqchip/renesas-rzg2l: add support for RZ/G3S SoC | expand |
diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c index 90971ab06f0c..d666912adc74 100644 --- a/drivers/irqchip/irq-renesas-rzg2l.c +++ b/drivers/irqchip/irq-renesas-rzg2l.c @@ -56,6 +56,12 @@ #define TINT_EXTRACT_HWIRQ(x) FIELD_GET(GENMASK(15, 0), (x)) #define TINT_EXTRACT_GPIOINT(x) FIELD_GET(GENMASK(31, 16), (x)) +/** + * struct rzg2l_irqc_priv - IRQ controller private data structure + * @base: controller's base address + * @fwspec: IRQ firmware specific data + * @lock: lock to protect concurrent access to hardware registers + */ struct rzg2l_irqc_priv { void __iomem *base; struct irq_fwspec fwspec[IRQC_NUM_IRQ];