From patchwork Mon Jan 8 13:02:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 13513467 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D33541208 for ; Mon, 8 Jan 2024 13:03:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="g65SwyyA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1704718989; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9XcEZtVlWJbYKm9+7v5nWl09Pma1pqjIHTzB6rryUDo=; b=g65SwyyAutJ3LHgBT2OOmsdHD5NG5b1ibqUFi+Aka9tYB8ABrGvhjlUaA+A0mQ4gVlD+BL hmE0dpw/RxZQJFWOtZFNVQqVyfzyoicLO7SLHj03vxa7CEEeg04rKARMyIg4t7sX/5PT+L o5UQ0rJ/iYDQqnTYg6cIkhKZ1SrqY/8= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-509-5uJmH4lkOfGH4zLP4AdeuQ-1; Mon, 08 Jan 2024 08:03:04 -0500 X-MC-Unique: 5uJmH4lkOfGH4zLP4AdeuQ-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 4BFF329AC01C; Mon, 8 Jan 2024 13:02:48 +0000 (UTC) Received: from x1.localdomain.com (unknown [10.39.194.88]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0D44F5190; Mon, 8 Jan 2024 13:02:45 +0000 (UTC) From: Hans de Goede To: Johannes Stezenbach , Takashi Iwai , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Michael Turquette , Stephen Boyd Cc: Hans de Goede , platform-driver-x86@vger.kernel.org, x86@kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v3 2/5] platform/x86: pmc_atom: Annotate d3_sts register bit defines Date: Mon, 8 Jan 2024 14:02:35 +0100 Message-ID: <20240108130238.540794-3-hdegoede@redhat.com> In-Reply-To: <20240108130238.540794-1-hdegoede@redhat.com> References: <20240108130238.540794-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 The include/linux/platform_data/x86/pmc_atom.h d3_sts register bit defines are named after how these bits are used on Bay Trail devices. On Cherry Trail (CHT) devices some of these bits have a different meaning according to the datasheet. At a comment to the defines for bits which have a different meaning on Cherry Trail devices. Signed-off-by: Hans de Goede --- include/linux/platform_data/x86/pmc_atom.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/include/linux/platform_data/x86/pmc_atom.h b/include/linux/platform_data/x86/pmc_atom.h index 557622ef0390..161e4bc1c9ee 100644 --- a/include/linux/platform_data/x86/pmc_atom.h +++ b/include/linux/platform_data/x86/pmc_atom.h @@ -117,14 +117,14 @@ #define BIT_SCC_SDIO BIT(9) #define BIT_SCC_SDCARD BIT(10) #define BIT_SCC_MIPI BIT(11) -#define BIT_HDA BIT(12) +#define BIT_HDA BIT(12) /* CHT datasheet: reserved */ #define BIT_LPE BIT(13) #define BIT_OTG BIT(14) -#define BIT_USH BIT(15) -#define BIT_GBE BIT(16) -#define BIT_SATA BIT(17) -#define BIT_USB_EHCI BIT(18) -#define BIT_SEC BIT(19) +#define BIT_USH BIT(15) /* CHT datasheet: reserved */ +#define BIT_GBE BIT(16) /* CHT datasheet: reserved */ +#define BIT_SATA BIT(17) /* CHT datasheet: reserved */ +#define BIT_USB_EHCI BIT(18) /* CHT datasheet: XHCI! */ +#define BIT_SEC BIT(19) /* BYT datasheet: reserved */ #define BIT_PCIE_PORT0 BIT(20) #define BIT_PCIE_PORT1 BIT(21) #define BIT_PCIE_PORT2 BIT(22)