| Message ID | 20240108135421.684263-6-tmaimon77@gmail.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | Introduce Nuvoton Arbel NPCM8XX BMC SoC | expand |
On 08/01/2024 14:54, Tomer Maimon wrote: > Add clock reset syscon node to handle reset and clock registers > controllers. > > Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> > --- > arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi > index 9c4df91031e7..7d5956e2c9f3 100644 > --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi > +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi > @@ -22,6 +22,11 @@ gcr: system-controller@f0800000 { > reg = <0x0 0xf0800000 0x0 0x1000>; > }; > > + clk_rst: syscon@f0801000 { > + compatible = "nuvoton,npcm845-clk-rst", "syscon", "simple-mfd"; This is not a simple-mfd. No children, > + reg = <0x0 0xf0801000 0x0 0xC4>; Use lowercase hex. Please store this feedback in your checklist and do not repeat the same mistakes in further submissions. Best regards, Krzysztof
Hi Krzysztof, Thanks for your comments. On Wed, 10 Jan 2024 at 23:01, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 08/01/2024 14:54, Tomer Maimon wrote: > > Add clock reset syscon node to handle reset and clock registers > > controllers. > > > > Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> > > --- > > arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi > > index 9c4df91031e7..7d5956e2c9f3 100644 > > --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi > > +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi > > @@ -22,6 +22,11 @@ gcr: system-controller@f0800000 { > > reg = <0x0 0xf0800000 0x0 0x1000>; > > }; > > > > + clk_rst: syscon@f0801000 { > > + compatible = "nuvoton,npcm845-clk-rst", "syscon", "simple-mfd"; > > This is not a simple-mfd. No children, > > > + reg = <0x0 0xf0801000 0x0 0xC4>; > > Use lowercase hex. Please store this feedback in your checklist and do > not repeat the same mistakes in further submissions. > > Best regards, > Krzysztof > will be fixed in the next version. Best regards, Tomer
diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi index 9c4df91031e7..7d5956e2c9f3 100644 --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi @@ -22,6 +22,11 @@ gcr: system-controller@f0800000 { reg = <0x0 0xf0800000 0x0 0x1000>; }; + clk_rst: syscon@f0801000 { + compatible = "nuvoton,npcm845-clk-rst", "syscon", "simple-mfd"; + reg = <0x0 0xf0801000 0x0 0xC4>; + }; + gic: interrupt-controller@dfff9000 { compatible = "arm,gic-400"; reg = <0x0 0xdfff9000 0x0 0x1000>,
Add clock reset syscon node to handle reset and clock registers controllers. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 5 +++++ 1 file changed, 5 insertions(+)