From patchwork Fri Feb 23 17:12:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 13569598 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1786B12CD90; Fri, 23 Feb 2024 17:12:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708708355; cv=none; b=VdOwjTgqfeDxSmKO27WlKGFqlCa93WrlrRuICQZ11l0qHExiQjLZfGvM/1ulUXojbL+g3YMLDIxDjCTbhimpVZyQ4ssyNqDH7O3UZa4TMC5RuH2uFgDT6nux/0Xo+gbP0IGCmxjRPZZf3wIRSixrf2sEbWnA7ewQhyT4JI32uYw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708708355; c=relaxed/simple; bh=iXlnN86FBtHze7pc7TT1EzncHtGJddooON9T6JhruhI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=isGM3MWj35whdrODWLM6+WWU+4Xo7bI8dmccNdh/DMZxIjC7zVFimTX204swkhRcdbzMh20/v3z2RBbiBJc0xdl3aIkcNe30vZmrMZ7u05iBHAq6IGbzwq4p7rsFI/glX0kDGZL3FYSZUxdshBREDnlunfxoiNgadWn8aovehbg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Ex/3ArZU; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Ex/3ArZU" Received: by smtp.kernel.org (Postfix) with ESMTPS id 9F82BC43143; Fri, 23 Feb 2024 17:12:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708708354; bh=iXlnN86FBtHze7pc7TT1EzncHtGJddooON9T6JhruhI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Ex/3ArZUqDnJjUx3ZC1AtZVJmmxd0kBaXG8VqSex2iWuvHheWlRht08R5PdCX7/JS JCg02S28c6aA6KnrF5/Q7OEjQg/N46QheSS/KkoQesKe5+WybfkLkyoWiMzDACLdaK YNUWeFodzIzYUUVDjvPmcetI0k3DtrZVk8njTKVUx4r9QByoF00Z4KPBNr+kMg+UI0 oY+Xz8GpfxHeRLDMSmfBH3NBZ5E68BbNY3q+9H7cJ/t68BZ2bP6fAuMkLgZ+JiWyQG StmIhDZx1gJOTbrL73Bn1h8mBaaY/aFvOYmK8S+tc3xotGHo14wBm1A8+1hnpdidpP /30zXAYrBCeFg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84AFCC54E4F; Fri, 23 Feb 2024 17:12:34 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Sat, 24 Feb 2024 01:12:30 +0800 Subject: [PATCH v5 3/6] arm64: dts: hisilicon: fix include path Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240224-clk-mv200-v5-3-79f586d6e1a2@outlook.com> References: <20240224-clk-mv200-v5-0-79f586d6e1a2@outlook.com> In-Reply-To: <20240224-clk-mv200-v5-0-79f586d6e1a2@outlook.com> To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: David Yang , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708708351; l=950; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=zO+w8jqaXi8Ww2B8vF6SfS+3nCbKAcDggVh4EP/9jpU=; b=m/+S05itWlQ30Ap9od5dWXU+DhSNZmKJ1WRyKNIxWY8aZzeBGh8iEuz5CFPLRErVQqroK0K93 whFgLijOMOACKC14GB9qTEIQ0N1aXHpPY4K1H56iVLGhKgFzGf7cNAJ X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen The generic histb-clock.h header is now deprecated. Fix it by including individual binding header files directly instead. Signed-off-by: Yang Xiwen --- arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi index ed1b5a7a6067..1e6a8a8829b1 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi @@ -5,7 +5,8 @@ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. */ -#include +#include +#include #include #include #include