| Message ID | 20240228-imx95-blk-ctl-v2-1-ffb7eefb6dcd@nxp.com (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | Add support i.MX95 BLK CTL module clock features | expand |
On Wed, 28 Feb 2024 13:43:05 +0800, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@nxp.com> > > i.MX95 includes BLK CTL module in several MIXes, such as VPU_CSR in > VPUMIX, BLK_CTRL_NETCMIX in NETCMIX, CAMERA_CSR in CAMERAMIX and etc. > > The BLK CTL module is used for various settings of a specific MIX, such > as clock, QoS and etc. > > This patch is to add some BLK CTL modules that has clock features. > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > .../devicetree/bindings/clock/imx95-blk-ctl.yaml | 61 ++++++++++++++++++++++ > include/dt-bindings/clock/nxp,imx95-clock.h | 32 ++++++++++++ > 2 files changed, 93 insertions(+) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/clock/imx95-blk-ctl.example.dtb: /example-0/syscon@4c410000: failed to match any schema with compatible: ['fsl,imx95-vpumix-csr', 'syscon'] doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240228-imx95-blk-ctl-v2-1-ffb7eefb6dcd@nxp.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 28/02/2024 06:43, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@nxp.com> > > i.MX95 includes BLK CTL module in several MIXes, such as VPU_CSR in > VPUMIX, BLK_CTRL_NETCMIX in NETCMIX, CAMERA_CSR in CAMERAMIX and etc. > > The BLK CTL module is used for various settings of a specific MIX, such > as clock, QoS and etc. > > This patch is to add some BLK CTL modules that has clock features. Please use subject prefixes matching the subsystem. You can get them for example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory your patch is touching. There are some typos, so you miss my filters... > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > .../devicetree/bindings/clock/imx95-blk-ctl.yaml | 61 ++++++++++++++++++++++ > include/dt-bindings/clock/nxp,imx95-clock.h | 32 ++++++++++++ > 2 files changed, 93 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/imx95-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/imx95-blk-ctl.yaml > new file mode 100644 > index 000000000000..6d33601034ae > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/imx95-blk-ctl.yaml > @@ -0,0 +1,61 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/imx95-blk-ctl.yaml# Filename like compatible. We talked about this. > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX95 Block Control > + > +maintainers: > + - Peng Fan <peng.fan@nxp.com> > + > +properties: > + compatible: > + items: > + - enum: > + - nxp,imx95-cameramix-csr > + - nxp,imx95-display-master-csr > + - nxp,imx95-dispmix-lvds-csr > + - nxp,imx95-dispmix-csr > + - nxp,imx95-netcmix-blk-ctrl > + - nxp,imx95-vpumix-csr > + - const: syscon > + > + reg: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + description: > + The clock consumer should specify the desired clock by having the clock > + ID in its "clocks" phandle cell. See > + include/dt-bindings/clock/nxp,imx95-clock.h > + > + mux-controller: > + type: object > + $ref: /schemas/mux/reg-mux.yaml > + > +required: > + - compatible > + - reg > + - '#clock-cells' > + > +additionalProperties: false > + > +examples: > + # Clock Control Module node: > + - | > + #include <dt-bindings/clock/nxp,imx95-clock.h> > + > + syscon@4c410000 { > + compatible = "fsl,imx95-vpumix-csr", "syscon"; > + reg = <0x4c410000 0x10000>; > + #clock-cells = <1>; Incomplete example. Add here mux controller and power domains. Best regards, Krzysztof
> Subject: Re: [PATCH v2 1/2] dt-bindindgs: clock: support NXP i.MX95 BLK CTL > module > > On 28/02/2024 06:43, Peng Fan (OSS) wrote: > > From: Peng Fan <peng.fan@nxp.com> > > > > i.MX95 includes BLK CTL module in several MIXes, such as VPU_CSR in > > VPUMIX, BLK_CTRL_NETCMIX in NETCMIX, CAMERA_CSR in CAMERAMIX > and etc. > > > > The BLK CTL module is used for various settings of a specific MIX, > > such as clock, QoS and etc. > > > > This patch is to add some BLK CTL modules that has clock features. > > Please use subject prefixes matching the subsystem. You can get them for > example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory your > patch is touching. > > There are some typos, so you miss my filters... Ah.. ok, will check more. Please ignore V3. > > > > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > > --- > > .../devicetree/bindings/clock/imx95-blk-ctl.yaml | 61 > ++++++++++++++++++++++ > > include/dt-bindings/clock/nxp,imx95-clock.h | 32 ++++++++++++ > > 2 files changed, 93 insertions(+) > > [....] > > Filename like compatible. We talked about this. ok, will use nxp,imx95-blk-ctl.yaml. > > > +$schema: > > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi > > +cetree.org%2Fmeta- > schemas%2Fcore.yaml%23&data=05%7C02%7Cpeng.fan%40nx > > > +p.com%7Ca6ed8c5ca4a745204f0e08dc38313f37%7C686ea1d3bc2b4c6fa9 > 2cd99c5c > > > +301635%7C0%7C0%7C638447031362290549%7CUnknown%7CTWFpbGZs > b3d8eyJWIjoiM > > > +C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7 > C%7C%7 > > > +C&sdata=DWrWMkSOrl%2FfCdEf%2BcTFjunNM66q3hHkPFGCzk1%2FsHo%3 > D&reserved > > +=0 > > + > > +title: NXP i.MX95 Block Control > > + > > +maintainers: > > + - Peng Fan <peng.fan@nxp.com> > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - nxp,imx95-cameramix-csr > > + - nxp,imx95-display-master-csr > > + - nxp,imx95-dispmix-lvds-csr > > + - nxp,imx95-dispmix-csr > > + - nxp,imx95-netcmix-blk-ctrl > > + - nxp,imx95-vpumix-csr > > + - const: syscon > > + > > + reg: > > + maxItems: 1 > > + > > + power-domains: > > + maxItems: 1 > > + > > + clocks: > > + maxItems: 1 > > + > > + '#clock-cells': > > + const: 1 > > + description: > > + The clock consumer should specify the desired clock by having the > clock > > + ID in its "clocks" phandle cell. See > > + include/dt-bindings/clock/nxp,imx95-clock.h > > + > > + mux-controller: > > + type: object > > + $ref: /schemas/mux/reg-mux.yaml > > + > > +required: > > + - compatible > > + - reg > > + - '#clock-cells' > > + > > +additionalProperties: false > > + > > +examples: > > + # Clock Control Module node: > > + - | > > + #include <dt-bindings/clock/nxp,imx95-clock.h> > > + > > + syscon@4c410000 { > > + compatible = "fsl,imx95-vpumix-csr", "syscon"; > > + reg = <0x4c410000 0x10000>; > > + #clock-cells = <1>; > > Incomplete example. Add here mux controller and power domains. ok. But since the power is managed by SCMI FW, and no header such as nxp,imx95-power.h, so I will use the number, such as <&scmi_devpd 0x5>. Thanks, Peng. > > > Best regards, > Krzysztof
On 28/02/2024 08:54, Peng Fan wrote: >> Subject: Re: [PATCH v2 1/2] dt-bindindgs: clock: support NXP i.MX95 BLK CTL >> module >> >> On 28/02/2024 06:43, Peng Fan (OSS) wrote: >>> From: Peng Fan <peng.fan@nxp.com> >>> >>> i.MX95 includes BLK CTL module in several MIXes, such as VPU_CSR in >>> VPUMIX, BLK_CTRL_NETCMIX in NETCMIX, CAMERA_CSR in CAMERAMIX >> and etc. >>> >>> The BLK CTL module is used for various settings of a specific MIX, >>> such as clock, QoS and etc. >>> >>> This patch is to add some BLK CTL modules that has clock features. >> >> Please use subject prefixes matching the subsystem. You can get them for >> example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory your >> patch is touching. >> >> There are some typos, so you miss my filters... > > Ah.. ok, will check more. Please ignore V3. Why do you send three versions the same day? Give people chance to review. One version per day is the max. Best regards, Krzysztof
> Subject: Re: [PATCH v2 1/2] dt-bindindgs: clock: support NXP i.MX95 BLK CTL > module > > On 28/02/2024 08:54, Peng Fan wrote: > >> Subject: Re: [PATCH v2 1/2] dt-bindindgs: clock: support NXP i.MX95 > >> BLK CTL module > >> > >> On 28/02/2024 06:43, Peng Fan (OSS) wrote: > >>> From: Peng Fan <peng.fan@nxp.com> > >>> > >>> i.MX95 includes BLK CTL module in several MIXes, such as VPU_CSR in > >>> VPUMIX, BLK_CTRL_NETCMIX in NETCMIX, CAMERA_CSR in CAMERAMIX > >> and etc. > >>> > >>> The BLK CTL module is used for various settings of a specific MIX, > >>> such as clock, QoS and etc. > >>> > >>> This patch is to add some BLK CTL modules that has clock features. > >> > >> Please use subject prefixes matching the subsystem. You can get them > >> for example with `git log --oneline -- DIRECTORY_OR_FILE` on the > >> directory your patch is touching. > >> > >> There are some typos, so you miss my filters... > > > > Ah.. ok, will check more. Please ignore V3. > > Why do you send three versions the same day? Give people chance to review. > One version per day is the max. Just wanna to quick fix the dt binding check error, but I made stupid mistake (: Sorry, will take care in future. Thanks for reviewing. Thanks, Peng. > > Best regards, > Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/imx95-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/imx95-blk-ctl.yaml new file mode 100644 index 000000000000..6d33601034ae --- /dev/null +++ b/Documentation/devicetree/bindings/clock/imx95-blk-ctl.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/imx95-blk-ctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX95 Block Control + +maintainers: + - Peng Fan <peng.fan@nxp.com> + +properties: + compatible: + items: + - enum: + - nxp,imx95-cameramix-csr + - nxp,imx95-display-master-csr + - nxp,imx95-dispmix-lvds-csr + - nxp,imx95-dispmix-csr + - nxp,imx95-netcmix-blk-ctrl + - nxp,imx95-vpumix-csr + - const: syscon + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See + include/dt-bindings/clock/nxp,imx95-clock.h + + mux-controller: + type: object + $ref: /schemas/mux/reg-mux.yaml + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + # Clock Control Module node: + - | + #include <dt-bindings/clock/nxp,imx95-clock.h> + + syscon@4c410000 { + compatible = "fsl,imx95-vpumix-csr", "syscon"; + reg = <0x4c410000 0x10000>; + #clock-cells = <1>; + }; +... diff --git a/include/dt-bindings/clock/nxp,imx95-clock.h b/include/dt-bindings/clock/nxp,imx95-clock.h new file mode 100644 index 000000000000..09120e098a97 --- /dev/null +++ b/include/dt-bindings/clock/nxp,imx95-clock.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ +/* + * Copyright 2024 NXP + */ + +#ifndef __DT_BINDINGS_CLOCK_IMX95_H +#define __DT_BINDINGS_CLOCK_IMX95_H + +#define IMX95_CLK_DISPMIX_ENG0_SEL 0 +#define IMX95_CLK_DISPMIX_ENG1_SEL 1 +#define IMX95_CLK_DISPMIX_END 2 + +#define IMX95_CLK_DISPMIX_LVDS_PHY_DIV 0 +#define IMX95_CLK_DISPMIX_LVDS_CH0_GATE 1 +#define IMX95_CLK_DISPMIX_LVDS_CH1_GATE 2 +#define IMX95_CLK_DISPMIX_PIX_DI0_GATE 3 +#define IMX95_CLK_DISPMIX_PIX_DI1_GATE 4 +#define IMX95_CLK_DISPMIX_LVDS_CSR_END 5 + +#define IMX95_CLK_VPUBLK_WAVE 0 +#define IMX95_CLK_VPUBLK_JPEG_ENC 1 +#define IMX95_CLK_VPUBLK_JPEG_DEC 2 +#define IMX95_CLK_VPUBLK_END 3 + +#define IMX95_CLK_CAMBLK_CSI2_FOR0 0 +#define IMX95_CLK_CAMBLK_CSI2_FOR1 1 +#define IMX95_CLK_CAMBLK_ISP_AXI 2 +#define IMX95_CLK_CAMBLK_ISP_PIXEL 3 +#define IMX95_CLK_CAMBLK_ISP 4 +#define IMX95_CLK_CAMBLK_END 5 + +#endif /* __DT_BINDINGS_CLOCK_IMX95_H */