| Message ID | 20240313-videocc-sm8150-dt-node-v1-3-ae8ec3c822c2@quicinc.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | Add DT support for video clock controller on SM8150 | expand |
On Wed, 13 Mar 2024 at 13:11, Satya Priya Kakitapalli <quic_skakitap@quicinc.com> wrote: > > Add device node for video clock controller on Qualcomm > SM8150 platform. > > Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sa8155p.dtsi | 4 ++++ > arch/arm64/boot/dts/qcom/sm8150.dtsi | 13 +++++++++++++ > 2 files changed, 17 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8155p.dtsi b/arch/arm64/boot/dts/qcom/sa8155p.dtsi > index ffb7ab695213..9e70effc72e1 100644 > --- a/arch/arm64/boot/dts/qcom/sa8155p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8155p.dtsi > @@ -38,3 +38,7 @@ &rpmhpd { > */ > compatible = "qcom,sa8155p-rpmhpd"; > }; > + > +&videocc { > + power-domains = <&rpmhpd SA8155P_CX>; > +}; > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi > index a35c0852b5a1..6573c907d7e2 100644 > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi > @@ -14,6 +14,7 @@ > #include <dt-bindings/clock/qcom,dispcc-sm8150.h> > #include <dt-bindings/clock/qcom,gcc-sm8150.h> > #include <dt-bindings/clock/qcom,gpucc-sm8150.h> > +#include <dt-bindings/clock/qcom,videocc-sm8150.h> > #include <dt-bindings/interconnect/qcom,osm-l3.h> > #include <dt-bindings/interconnect/qcom,sm8150.h> > #include <dt-bindings/thermal/thermal.h> > @@ -3715,6 +3716,18 @@ usb_2_dwc3: usb@a800000 { > }; > }; > > + videocc: clock-controller@ab00000 { > + compatible = "qcom,sm8150-videocc"; > + reg = <0 0x0ab00000 0 0x10000>; > + clocks = <&rpmhcc RPMH_CXO_CLK>, > + <&gcc GCC_VIDEO_AHB_CLK>; > + power-domains = <&rpmhpd SM8150_MMCX>; > + required-opps = <&rpmhpd_opp_low_svs>; Should not be necessary anymore. > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > camnoc_virt: interconnect@ac00000 { > compatible = "qcom,sm8150-camnoc-virt"; > reg = <0 0x0ac00000 0 0x1000>; > > -- > 2.25.1 > >
On 3/14/2024 12:46 AM, Dmitry Baryshkov wrote: > On Wed, 13 Mar 2024 at 13:11, Satya Priya Kakitapalli > <quic_skakitap@quicinc.com> wrote: >> Add device node for video clock controller on Qualcomm >> SM8150 platform. >> >> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sa8155p.dtsi | 4 ++++ >> arch/arm64/boot/dts/qcom/sm8150.dtsi | 13 +++++++++++++ >> 2 files changed, 17 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sa8155p.dtsi b/arch/arm64/boot/dts/qcom/sa8155p.dtsi >> index ffb7ab695213..9e70effc72e1 100644 >> --- a/arch/arm64/boot/dts/qcom/sa8155p.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sa8155p.dtsi >> @@ -38,3 +38,7 @@ &rpmhpd { >> */ >> compatible = "qcom,sa8155p-rpmhpd"; >> }; >> + >> +&videocc { >> + power-domains = <&rpmhpd SA8155P_CX>; >> +}; >> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi >> index a35c0852b5a1..6573c907d7e2 100644 >> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi >> @@ -14,6 +14,7 @@ >> #include <dt-bindings/clock/qcom,dispcc-sm8150.h> >> #include <dt-bindings/clock/qcom,gcc-sm8150.h> >> #include <dt-bindings/clock/qcom,gpucc-sm8150.h> >> +#include <dt-bindings/clock/qcom,videocc-sm8150.h> >> #include <dt-bindings/interconnect/qcom,osm-l3.h> >> #include <dt-bindings/interconnect/qcom,sm8150.h> >> #include <dt-bindings/thermal/thermal.h> >> @@ -3715,6 +3716,18 @@ usb_2_dwc3: usb@a800000 { >> }; >> }; >> >> + videocc: clock-controller@ab00000 { >> + compatible = "qcom,sm8150-videocc"; >> + reg = <0 0x0ab00000 0 0x10000>; >> + clocks = <&rpmhcc RPMH_CXO_CLK>, >> + <&gcc GCC_VIDEO_AHB_CLK>; >> + power-domains = <&rpmhpd SM8150_MMCX>; >> + required-opps = <&rpmhpd_opp_low_svs>; > Should not be necessary anymore. Whenever the rail is turned on, we want to keep it in low_svs state instead of retention, hence added this property , please let me know why you think it is not needed? >> + #clock-cells = <1>; >> + #reset-cells = <1>; >> + #power-domain-cells = <1>; >> + }; >> + >> camnoc_virt: interconnect@ac00000 { >> compatible = "qcom,sm8150-camnoc-virt"; >> reg = <0 0x0ac00000 0 0x1000>; >> >> -- >> 2.25.1 >> >> >
On Thu, 14 Mar 2024 at 11:14, Satya Priya Kakitapalli (Temp) <quic_skakitap@quicinc.com> wrote: > > > On 3/14/2024 12:46 AM, Dmitry Baryshkov wrote: > > On Wed, 13 Mar 2024 at 13:11, Satya Priya Kakitapalli > > <quic_skakitap@quicinc.com> wrote: > >> Add device node for video clock controller on Qualcomm > >> SM8150 platform. > >> > >> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> > >> --- > >> arch/arm64/boot/dts/qcom/sa8155p.dtsi | 4 ++++ > >> arch/arm64/boot/dts/qcom/sm8150.dtsi | 13 +++++++++++++ > >> 2 files changed, 17 insertions(+) > >> > >> diff --git a/arch/arm64/boot/dts/qcom/sa8155p.dtsi b/arch/arm64/boot/dts/qcom/sa8155p.dtsi > >> index ffb7ab695213..9e70effc72e1 100644 > >> --- a/arch/arm64/boot/dts/qcom/sa8155p.dtsi > >> +++ b/arch/arm64/boot/dts/qcom/sa8155p.dtsi > >> @@ -38,3 +38,7 @@ &rpmhpd { > >> */ > >> compatible = "qcom,sa8155p-rpmhpd"; > >> }; > >> + > >> +&videocc { > >> + power-domains = <&rpmhpd SA8155P_CX>; > >> +}; > >> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi > >> index a35c0852b5a1..6573c907d7e2 100644 > >> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi > >> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi > >> @@ -14,6 +14,7 @@ > >> #include <dt-bindings/clock/qcom,dispcc-sm8150.h> > >> #include <dt-bindings/clock/qcom,gcc-sm8150.h> > >> #include <dt-bindings/clock/qcom,gpucc-sm8150.h> > >> +#include <dt-bindings/clock/qcom,videocc-sm8150.h> > >> #include <dt-bindings/interconnect/qcom,osm-l3.h> > >> #include <dt-bindings/interconnect/qcom,sm8150.h> > >> #include <dt-bindings/thermal/thermal.h> > >> @@ -3715,6 +3716,18 @@ usb_2_dwc3: usb@a800000 { > >> }; > >> }; > >> > >> + videocc: clock-controller@ab00000 { > >> + compatible = "qcom,sm8150-videocc"; > >> + reg = <0 0x0ab00000 0 0x10000>; > >> + clocks = <&rpmhcc RPMH_CXO_CLK>, > >> + <&gcc GCC_VIDEO_AHB_CLK>; > >> + power-domains = <&rpmhpd SM8150_MMCX>; > >> + required-opps = <&rpmhpd_opp_low_svs>; > > Should not be necessary anymore. > > > Whenever the rail is turned on, we want to keep it in low_svs state > instead of retention, hence added this property , please let me know why > you think it is not needed? See https://lore.kernel.org/linux-arm-msm/20240226-rpmhpd-enable-corner-fix-v1-1-68c004cec48c@quicinc.com/ > > > >> + #clock-cells = <1>; > >> + #reset-cells = <1>; > >> + #power-domain-cells = <1>; > >> + }; > >> + > >> camnoc_virt: interconnect@ac00000 { > >> compatible = "qcom,sm8150-camnoc-virt"; > >> reg = <0 0x0ac00000 0 0x1000>; > >> > >> -- > >> 2.25.1 > >> > >> > >
diff --git a/arch/arm64/boot/dts/qcom/sa8155p.dtsi b/arch/arm64/boot/dts/qcom/sa8155p.dtsi index ffb7ab695213..9e70effc72e1 100644 --- a/arch/arm64/boot/dts/qcom/sa8155p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155p.dtsi @@ -38,3 +38,7 @@ &rpmhpd { */ compatible = "qcom,sa8155p-rpmhpd"; }; + +&videocc { + power-domains = <&rpmhpd SA8155P_CX>; +}; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index a35c0852b5a1..6573c907d7e2 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -14,6 +14,7 @@ #include <dt-bindings/clock/qcom,dispcc-sm8150.h> #include <dt-bindings/clock/qcom,gcc-sm8150.h> #include <dt-bindings/clock/qcom,gpucc-sm8150.h> +#include <dt-bindings/clock/qcom,videocc-sm8150.h> #include <dt-bindings/interconnect/qcom,osm-l3.h> #include <dt-bindings/interconnect/qcom,sm8150.h> #include <dt-bindings/thermal/thermal.h> @@ -3715,6 +3716,18 @@ usb_2_dwc3: usb@a800000 { }; }; + videocc: clock-controller@ab00000 { + compatible = "qcom,sm8150-videocc"; + reg = <0 0x0ab00000 0 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_VIDEO_AHB_CLK>; + power-domains = <&rpmhpd SM8150_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + camnoc_virt: interconnect@ac00000 { compatible = "qcom,sm8150-camnoc-virt"; reg = <0 0x0ac00000 0 0x1000>;
Add device node for video clock controller on Qualcomm SM8150 platform. Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> --- arch/arm64/boot/dts/qcom/sa8155p.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/sm8150.dtsi | 13 +++++++++++++ 2 files changed, 17 insertions(+)