From patchwork Mon Mar 18 05:35:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taniya Das X-Patchwork-Id: 13595001 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B98061E4AE; Mon, 18 Mar 2024 05:36:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710740220; cv=none; b=pGqrSaWE9jHSSgbDwuTzfGI6+PsXOSWOG4Mfz0rP3S69HtidznHkX3HEd0KPibxyf4mICXyKIHAw3C7nGDJdS0qezI8OiDXT0l9ijKcph5KmiRXiErMupJR2zfEG6pAlQm24YktTp3QrpUF83kVOVupq9N5KtS+xt7KUl3BXhFc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710740220; c=relaxed/simple; bh=oGbaR0i8Qr7k8SS8hk/DZ/BmtWS7ksjI1F2CKdI2c10=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=NvFlCLUoQT2eJ7WB7nnXEqGlwyjiPR7llfqvbnz+2ppHLYduqZdPYVEpaMLjbMADi16dnAkhxQq8pws1gLiARw02NsWJMKeUezT76LHKrJwl3FLMjEOjh2qLV3abZp8WrAaP4BsduglHrtgZmbUnhVsHKDIPNMFTGtEjtDDHb54= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=NfxB1lvQ; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="NfxB1lvQ" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 42I4NVZ0031934; Mon, 18 Mar 2024 05:36:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=Z4WYBX/Fsi5r4bbK/sZy dQoLKZkICGc8sceP9osvadk=; b=NfxB1lvQaE2lOxAwNetCmS4dDQADIJTGyohI YrBe3QkuptecpQhDEYKShXnG/xhgAzwk2cGwHASl61kCQ5zDnoS98W3irFGHyPxh Vvo0roBU3xj6iWdIJkx60ASqwCO7i+4kAJTCTxoUMgysRXTHC8CBR4WL+YSrWrLR X8XGWMlCnXI891UtD8SGPuu7Uw6xGjYKI2qkq4TJOC0vTE3Cypu5/i7mIC/OCtzs P6jkozR1q7kFBECRhsQIwQCT+ErMERpKkq8UJAzii9jmeOWSyTW9ksyb1GsZ9GPh sCD7IFUU+oLTKkEFZmk26IY74cAnUXiCW08n9ZhaaWIL12Yicg== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3wwxtb94fq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 18 Mar 2024 05:36:55 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 42I5asT3014385 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 18 Mar 2024 05:36:54 GMT Received: from hu-tdas-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Sun, 17 Mar 2024 22:36:50 -0700 From: Taniya Das To: Stephen Boyd , =?utf-8?q?Michael_Turquette_=C2=A0?= , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Taniya Das , , , Subject: [PATCH v2 2/8] clk: qcom: lpassaudiocc-sc7280: Add support for LPASS resets for QCM6490 Date: Mon, 18 Mar 2024 11:05:49 +0530 Message-ID: <20240318053555.20405-3-quic_tdas@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240318053555.20405-1-quic_tdas@quicinc.com> References: <20240318053555.20405-1-quic_tdas@quicinc.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: HFd3OYf-fE1BPiXuJF0RXFfQZZQ2ANnD X-Proofpoint-ORIG-GUID: HFd3OYf-fE1BPiXuJF0RXFfQZZQ2ANnD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-17_12,2024-03-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 phishscore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 impostorscore=0 adultscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2403140001 definitions=main-2403180040 On the QCM6490 boards the LPASS firmware controls the complete clock controller functionalities. But the LPASS resets are required to be from the high level OS for the LPASS SW driver could assert/deassert the audio resets. Fixes: a9dd26639d05 ("clk: qcom: lpass: Add support for LPASS clock controller for SC7280") Signed-off-by: Taniya Das --- drivers/clk/qcom/lpassaudiocc-sc7280.c | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.17.1 diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lpassaudiocc-sc7280.c index c43d0b1af7f7..d68139762a80 100644 --- a/drivers/clk/qcom/lpassaudiocc-sc7280.c +++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -721,6 +722,7 @@ static const struct qcom_cc_desc lpass_audio_cc_reset_sc7280_desc = { static const struct of_device_id lpass_audio_cc_sc7280_match_table[] = { { .compatible = "qcom,sc7280-lpassaudiocc" }, + { .compatible = "qcom,qcm6490-lpassaudiocc" }, { } }; MODULE_DEVICE_TABLE(of, lpass_audio_cc_sc7280_match_table); @@ -752,6 +754,13 @@ static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev) struct regmap *regmap; int ret; + if (of_device_is_compatible(pdev->dev.of_node, "qcom,qcm6490-lpassaudiocc")) { + ret = qcom_cc_probe_by_index(pdev, 1, &lpass_audio_cc_reset_sc7280_desc); + if (ret) + dev_err(&pdev->dev, "Failed to register LPASS AUDIO CC Resets\n"); + return ret; + } + ret = lpass_audio_setup_runtime_pm(pdev); if (ret) return ret;