| Message ID | 20240415182052.374494-5-mr.nuke.me@gmail.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | ipq9574: Enable PCI-Express support | expand |
On Mon, 15 Apr 2024 at 21:22, Alexandru Gagniuc <mr.nuke.me@gmail.com> wrote: > > Add support for the PCIe on IPQ9574. The main difference from ipq6018 > is that the "iface" clock is not necessarry. Add a special case in > qcom_pcie_get_resources_2_9_0() to handle this. > > Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> > --- > drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 14772edcf0d3..10560d6d6336 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -1101,15 +1101,19 @@ static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie) > struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0; > struct dw_pcie *pci = pcie->pci; > struct device *dev = pci->dev; > - int ret; > + int ret, num_clks = ARRAY_SIZE(res->clks) - 1; > > - res->clks[0].id = "iface"; > + res->clks[0].id = "rchng"; > res->clks[1].id = "axi_m"; > res->clks[2].id = "axi_s"; > res->clks[3].id = "axi_bridge"; > - res->clks[4].id = "rchng"; > > - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); > + if (!of_device_is_compatible(dev->of_node, "qcom,pcie-ipq9574")) { > + res->clks[4].id = "iface"; > + num_clks++; > + } > + > + ret = devm_clk_bulk_get(dev, num_clks, res->clks); Just use devm_clk_bulk_get_optional() here. > if (ret < 0) > return ret; > > @@ -1664,6 +1668,7 @@ static const struct of_device_id qcom_pcie_match[] = { > { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, > { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 }, > { .compatible = "qcom,pcie-ipq8074-gen3", .data = &cfg_2_9_0 }, > + { .compatible = "qcom,pcie-ipq9574", .data = &cfg_2_9_0 }, > { .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 }, > { .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 }, > { .compatible = "qcom,pcie-sa8540p", .data = &cfg_sc8280xp }, > -- > 2.40.1 > >
On 4/15/24 15:04, Dmitry Baryshkov wrote: > On Mon, 15 Apr 2024 at 21:22, Alexandru Gagniuc <mr.nuke.me@gmail.com> wrote: >> >> Add support for the PCIe on IPQ9574. The main difference from ipq6018 >> is that the "iface" clock is not necessarry. Add a special case in >> qcom_pcie_get_resources_2_9_0() to handle this. >> >> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> >> --- >> drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++---- >> 1 file changed, 9 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c >> index 14772edcf0d3..10560d6d6336 100644 >> --- a/drivers/pci/controller/dwc/pcie-qcom.c >> +++ b/drivers/pci/controller/dwc/pcie-qcom.c >> @@ -1101,15 +1101,19 @@ static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie) >> struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0; >> struct dw_pcie *pci = pcie->pci; >> struct device *dev = pci->dev; >> - int ret; >> + int ret, num_clks = ARRAY_SIZE(res->clks) - 1; >> >> - res->clks[0].id = "iface"; >> + res->clks[0].id = "rchng"; >> res->clks[1].id = "axi_m"; >> res->clks[2].id = "axi_s"; >> res->clks[3].id = "axi_bridge"; >> - res->clks[4].id = "rchng"; >> >> - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); >> + if (!of_device_is_compatible(dev->of_node, "qcom,pcie-ipq9574")) { >> + res->clks[4].id = "iface"; >> + num_clks++; >> + } >> + >> + ret = devm_clk_bulk_get(dev, num_clks, res->clks); > > Just use devm_clk_bulk_get_optional() here. Thank you! I wasn't sure if this was the correct solution here. I will get this updated in v4. Alex >> if (ret < 0) >> return ret; >> >> @@ -1664,6 +1668,7 @@ static const struct of_device_id qcom_pcie_match[] = { >> { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, >> { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 }, >> { .compatible = "qcom,pcie-ipq8074-gen3", .data = &cfg_2_9_0 }, >> + { .compatible = "qcom,pcie-ipq9574", .data = &cfg_2_9_0 }, >> { .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 }, >> { .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 }, >> { .compatible = "qcom,pcie-sa8540p", .data = &cfg_sc8280xp }, >> -- >> 2.40.1 >> >> > >
On Mon, Apr 15, 2024 at 03:07:02PM -0500, mr.nuke.me@gmail.com wrote: > > > On 4/15/24 15:04, Dmitry Baryshkov wrote: > > On Mon, 15 Apr 2024 at 21:22, Alexandru Gagniuc <mr.nuke.me@gmail.com> wrote: > > > > > > Add support for the PCIe on IPQ9574. The main difference from ipq6018 > > > is that the "iface" clock is not necessarry. Add a special case in > > > qcom_pcie_get_resources_2_9_0() to handle this. > > > > > > Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> > > > --- > > > drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++---- > > > 1 file changed, 9 insertions(+), 4 deletions(-) > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > > > index 14772edcf0d3..10560d6d6336 100644 > > > --- a/drivers/pci/controller/dwc/pcie-qcom.c > > > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > > > @@ -1101,15 +1101,19 @@ static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie) > > > struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0; > > > struct dw_pcie *pci = pcie->pci; > > > struct device *dev = pci->dev; > > > - int ret; > > > + int ret, num_clks = ARRAY_SIZE(res->clks) - 1; > > > > > > - res->clks[0].id = "iface"; > > > + res->clks[0].id = "rchng"; > > > res->clks[1].id = "axi_m"; > > > res->clks[2].id = "axi_s"; > > > res->clks[3].id = "axi_bridge"; > > > - res->clks[4].id = "rchng"; > > > > > > - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); > > > + if (!of_device_is_compatible(dev->of_node, "qcom,pcie-ipq9574")) { > > > + res->clks[4].id = "iface"; > > > + num_clks++; > > > + } > > > + > > > + ret = devm_clk_bulk_get(dev, num_clks, res->clks); > > > > Just use devm_clk_bulk_get_optional() here. > > Thank you! I wasn't sure if this was the correct solution here. I will get > this updated in v4. > Please rebase on top of [1] and mention the dependency in cover letter. - Mani [1] https://lore.kernel.org/linux-pci/20240417-pci-qcom-clk-bulk-v1-1-52ca19b3d6b2@linaro.org/ > Alex > > > > if (ret < 0) > > > return ret; > > > > > > @@ -1664,6 +1668,7 @@ static const struct of_device_id qcom_pcie_match[] = { > > > { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, > > > { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 }, > > > { .compatible = "qcom,pcie-ipq8074-gen3", .data = &cfg_2_9_0 }, > > > + { .compatible = "qcom,pcie-ipq9574", .data = &cfg_2_9_0 }, > > > { .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 }, > > > { .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 }, > > > { .compatible = "qcom,pcie-sa8540p", .data = &cfg_sc8280xp }, > > > -- > > > 2.40.1 > > > > > > > > > >
On Mon, Apr 15, 2024 at 01:20:49PM -0500, Alexandru Gagniuc wrote: > Add support for the PCIe on IPQ9574. The main difference from ipq6018 > is that the "iface" clock is not necessarry. Add a special case in > qcom_pcie_get_resources_2_9_0() to handle this. > Could you add more information about the PCIe controller used in this SoC? Like controller version, supported data rate, PCIe generation etc... - Mani > Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> > --- > drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 14772edcf0d3..10560d6d6336 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -1101,15 +1101,19 @@ static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie) > struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0; > struct dw_pcie *pci = pcie->pci; > struct device *dev = pci->dev; > - int ret; > + int ret, num_clks = ARRAY_SIZE(res->clks) - 1; > > - res->clks[0].id = "iface"; > + res->clks[0].id = "rchng"; > res->clks[1].id = "axi_m"; > res->clks[2].id = "axi_s"; > res->clks[3].id = "axi_bridge"; > - res->clks[4].id = "rchng"; > > - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); > + if (!of_device_is_compatible(dev->of_node, "qcom,pcie-ipq9574")) { > + res->clks[4].id = "iface"; > + num_clks++; > + } > + > + ret = devm_clk_bulk_get(dev, num_clks, res->clks); > if (ret < 0) > return ret; > > @@ -1664,6 +1668,7 @@ static const struct of_device_id qcom_pcie_match[] = { > { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, > { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 }, > { .compatible = "qcom,pcie-ipq8074-gen3", .data = &cfg_2_9_0 }, > + { .compatible = "qcom,pcie-ipq9574", .data = &cfg_2_9_0 }, > { .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 }, > { .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 }, > { .compatible = "qcom,pcie-sa8540p", .data = &cfg_sc8280xp }, > -- > 2.40.1 >
Hi Mani. On 4/17/24 02:06, Manivannan Sadhasivam wrote: > On Mon, Apr 15, 2024 at 03:07:02PM -0500, mr.nuke.me@gmail.com wrote: >> >> >> On 4/15/24 15:04, Dmitry Baryshkov wrote: >>> On Mon, 15 Apr 2024 at 21:22, Alexandru Gagniuc <mr.nuke.me@gmail.com> wrote: >>>> >>>> Add support for the PCIe on IPQ9574. The main difference from ipq6018 >>>> is that the "iface" clock is not necessarry. Add a special case in >>>> qcom_pcie_get_resources_2_9_0() to handle this. >>>> >>>> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> >>>> --- >>>> drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++---- >>>> 1 file changed, 9 insertions(+), 4 deletions(-) >>>> >>>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c >>>> index 14772edcf0d3..10560d6d6336 100644 >>>> --- a/drivers/pci/controller/dwc/pcie-qcom.c >>>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c >>>> @@ -1101,15 +1101,19 @@ static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie) >>>> struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0; >>>> struct dw_pcie *pci = pcie->pci; >>>> struct device *dev = pci->dev; >>>> - int ret; >>>> + int ret, num_clks = ARRAY_SIZE(res->clks) - 1; >>>> >>>> - res->clks[0].id = "iface"; >>>> + res->clks[0].id = "rchng"; >>>> res->clks[1].id = "axi_m"; >>>> res->clks[2].id = "axi_s"; >>>> res->clks[3].id = "axi_bridge"; >>>> - res->clks[4].id = "rchng"; >>>> >>>> - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); >>>> + if (!of_device_is_compatible(dev->of_node, "qcom,pcie-ipq9574")) { >>>> + res->clks[4].id = "iface"; >>>> + num_clks++; >>>> + } >>>> + >>>> + ret = devm_clk_bulk_get(dev, num_clks, res->clks); >>> >>> Just use devm_clk_bulk_get_optional() here. >> >> Thank you! I wasn't sure if this was the correct solution here. I will get >> this updated in v4. >> > > Please rebase on top of [1] and mention the dependency in cover letter. I am very hesitant to depend on another patch series. Is it okay if I include your patch in v4 of this series? Alex
On Fri, Apr 19, 2024 at 02:44:36PM -0500, mr.nuke.me@gmail.com wrote: > Hi Mani. > > On 4/17/24 02:06, Manivannan Sadhasivam wrote: > > On Mon, Apr 15, 2024 at 03:07:02PM -0500, mr.nuke.me@gmail.com wrote: > > > > > > > > > On 4/15/24 15:04, Dmitry Baryshkov wrote: > > > > On Mon, 15 Apr 2024 at 21:22, Alexandru Gagniuc <mr.nuke.me@gmail.com> wrote: > > > > > > > > > > Add support for the PCIe on IPQ9574. The main difference from ipq6018 > > > > > is that the "iface" clock is not necessarry. Add a special case in > > > > > qcom_pcie_get_resources_2_9_0() to handle this. > > > > > > > > > > Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> > > > > > --- > > > > > drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++---- > > > > > 1 file changed, 9 insertions(+), 4 deletions(-) > > > > > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > > > > > index 14772edcf0d3..10560d6d6336 100644 > > > > > --- a/drivers/pci/controller/dwc/pcie-qcom.c > > > > > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > > > > > @@ -1101,15 +1101,19 @@ static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie) > > > > > struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0; > > > > > struct dw_pcie *pci = pcie->pci; > > > > > struct device *dev = pci->dev; > > > > > - int ret; > > > > > + int ret, num_clks = ARRAY_SIZE(res->clks) - 1; > > > > > > > > > > - res->clks[0].id = "iface"; > > > > > + res->clks[0].id = "rchng"; > > > > > res->clks[1].id = "axi_m"; > > > > > res->clks[2].id = "axi_s"; > > > > > res->clks[3].id = "axi_bridge"; > > > > > - res->clks[4].id = "rchng"; > > > > > > > > > > - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); > > > > > + if (!of_device_is_compatible(dev->of_node, "qcom,pcie-ipq9574")) { > > > > > + res->clks[4].id = "iface"; > > > > > + num_clks++; > > > > > + } > > > > > + > > > > > + ret = devm_clk_bulk_get(dev, num_clks, res->clks); > > > > > > > > Just use devm_clk_bulk_get_optional() here. > > > > > > Thank you! I wasn't sure if this was the correct solution here. I will get > > > this updated in v4. > > > > > > > Please rebase on top of [1] and mention the dependency in cover letter. > > I am very hesitant to depend on another patch series. Is it okay if I > include your patch in v4 of this series? > Feel free to. - Mani
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 14772edcf0d3..10560d6d6336 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1101,15 +1101,19 @@ static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie) struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0; struct dw_pcie *pci = pcie->pci; struct device *dev = pci->dev; - int ret; + int ret, num_clks = ARRAY_SIZE(res->clks) - 1; - res->clks[0].id = "iface"; + res->clks[0].id = "rchng"; res->clks[1].id = "axi_m"; res->clks[2].id = "axi_s"; res->clks[3].id = "axi_bridge"; - res->clks[4].id = "rchng"; - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); + if (!of_device_is_compatible(dev->of_node, "qcom,pcie-ipq9574")) { + res->clks[4].id = "iface"; + num_clks++; + } + + ret = devm_clk_bulk_get(dev, num_clks, res->clks); if (ret < 0) return ret; @@ -1664,6 +1668,7 @@ static const struct of_device_id qcom_pcie_match[] = { { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 }, { .compatible = "qcom,pcie-ipq8074-gen3", .data = &cfg_2_9_0 }, + { .compatible = "qcom,pcie-ipq9574", .data = &cfg_2_9_0 }, { .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 }, { .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 }, { .compatible = "qcom,pcie-sa8540p", .data = &cfg_sc8280xp },
Add support for the PCIe on IPQ9574. The main difference from ipq6018 is that the "iface" clock is not necessarry. Add a special case in qcom_pcie_get_resources_2_9_0() to handle this. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> --- drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-)