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a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B Just like most of clock controllers, the QCM2290 Display clock controller is also some variant of standard Qualcomm GCC, so reference common qcom,gcc.yaml schema to simplify the binding and unify it with others. Signed-off-by: Krzysztof Kozlowski --- .../bindings/clock/qcom,qcm2290-dispcc.yaml | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml index 4a00f2d41684..243be4f76db3 100644 --- a/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml @@ -37,28 +37,16 @@ properties: - const: dsi0_phy_pll_out_byteclk - const: dsi0_phy_pll_out_dsiclk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - required: - compatible - - reg - clocks - clock-names - - '#clock-cells' - - '#reset-cells' - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - |