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Tue, 9 Jul 2024 14:35:50 GMT Received: from tengfan-gv.ap.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 9 Jul 2024 07:35:45 -0700 From: Tengfei Fan Date: Tue, 9 Jul 2024 22:35:30 +0800 Subject: [PATCH v2 2/2] clk: qcom: rpmh: Add support for QCS9100 rpmh clocks Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240709-add_qcs9100_rpmh_clk_compatible-v2-2-b6f516c36818@quicinc.com> References: <20240709-add_qcs9100_rpmh_clk_compatible-v2-0-b6f516c36818@quicinc.com> In-Reply-To: <20240709-add_qcs9100_rpmh_clk_compatible-v2-0-b6f516c36818@quicinc.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das CC: , , , , , Tengfei Fan X-Mailer: b4 0.15-dev-a66ce X-Developer-Signature: v=1; a=ed25519-sha256; t=1720535739; l=1122; i=quic_tengfan@quicinc.com; s=20240709; h=from:subject:message-id; bh=/7V0EJxNZ4cEHLfTToLfwG5Wl7+cvEDF+WpH3vQtF7w=; b=VpBE2NUBCpPrPTAvozBOwJ3ZD1QF/Tk8aXbOOt6tGJckq6t95+fFXeHuaWuKvracxK5BktQji 3OEMb2MT2E6ABkmXMI36czryXAJ/MNOLudcHMXrk6CeXacppkKGUg2H X-Developer-Key: i=quic_tengfan@quicinc.com; a=ed25519; pk=4VjoTogHXJhZUM9XlxbCAcZ4zmrLeuep4dfOeKqQD0c= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Izs8vD4YGjESvH9WrxZXJaupdSjquVGc X-Proofpoint-ORIG-GUID: Izs8vD4YGjESvH9WrxZXJaupdSjquVGc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-09_04,2024-07-09_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=915 suspectscore=0 lowpriorityscore=0 impostorscore=0 phishscore=0 spamscore=0 clxscore=1015 adultscore=0 malwarescore=0 mlxscore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407090095 Adds the RPMH clocks present in QCS9100 SoC. QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p platform use non-SCMI resource. In the future, the SA8775p platform will move to use SCMI resources and it will have new sa8775p-related device tree. Consequently, introduce "qcom,qcs9100-rpmh-clk" to the rpmh clock device match table. Signed-off-by: Tengfei Fan --- drivers/clk/qcom/clk-rpmh.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c index bb82abeed88f..8131afba85d6 100644 --- a/drivers/clk/qcom/clk-rpmh.c +++ b/drivers/clk/qcom/clk-rpmh.c @@ -876,6 +876,7 @@ static int clk_rpmh_probe(struct platform_device *pdev) } static const struct of_device_id clk_rpmh_match_table[] = { + { .compatible = "qcom,qcs9100-rpmh-clk", .data = &clk_rpmh_sa8775p}, { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdu1000}, { .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p}, { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180},