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Thu, 11 Jul 2024 09:56:29 -0700 (PDT) From: Drew Fustini Date: Thu, 11 Jul 2024 09:56:21 -0700 Subject: [PATCH v3 3/7] riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240711-th1520-clk-v3-3-6ff17bb318fb@tenstorrent.com> References: <20240711-th1520-clk-v3-0-6ff17bb318fb@tenstorrent.com> In-Reply-To: <20240711-th1520-clk-v3-0-6ff17bb318fb@tenstorrent.com> To: Jisheng Zhang , Guo Ren , Fu Wei , Yangtao Li , Thomas Bonnefille , Emil Renner Berthing , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Drew Fustini X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1720716985; l=1213; i=dfustini@tenstorrent.com; s=20230430; h=from:subject:message-id; bh=sYDrZi/IT7Clln9yQAfkFJd8E3JI+vZ/XaYw2j6k+PM=; b=wUrrFs5q2J1pzVgeXUmh4OazEalf5YR5o4KRGJccYDi2MKdzK9ga2hXoA5XTCRa+cFkuSufnJ 8urCX2niya3A1uefhZS985sJ9D73ukNMDwmyPRrI5M1Eacls5UR+wTd X-Developer-Key: i=dfustini@tenstorrent.com; a=ed25519; pk=p3GKE9XFmjhwAayAHG4U108yag7V8xQVd4zJLdW0g7g= Add node for the AP_SUBSYS clock controller on the T-Head TH1520 SoC. Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs Signed-off-by: Drew Fustini --- arch/riscv/boot/dts/thead/th1520.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index d2fa25839012..10a38ed55658 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -5,6 +5,7 @@ */ #include +#include / { compatible = "thead,th1520"; @@ -161,6 +162,13 @@ soc { dma-noncoherent; ranges; + clk: clock-controller@ffef010000 { + compatible = "thead,th1520-clk-ap"; + reg = <0xff 0xef010000 0x0 0x1000>; + clocks = <&osc>; + #clock-cells = <1>; + }; + plic: interrupt-controller@ffd8000000 { compatible = "thead,th1520-plic", "thead,c900-plic"; reg = <0xff 0xd8000000 0x0 0x01000000>;