| Message ID | 20240725-gcc-sc8180x-fixes-v1-4-576a55fe4780@quicinc.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | clk: qcom: gcc-sc8180x: Add DFS support and few fixes | expand |
On Thu, Jul 25, 2024 at 05:03:14PM GMT, Satya Priya Kakitapalli wrote: > Update the frequency tables of gcc_sdcc2_apps_clk and gcc_sdcc4_apps_clk > as per the latest frequency plan. > > Fixes: 4433594bbe5d ("clk: qcom: gcc: Add global clock controller driver for SC8180x") > Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Fixes should come first in the series. Also consider following stable kernel process. If possible, describe the reason for the changes. > --- > drivers/clk/qcom/gcc-sc8180x.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/qcom/gcc-sc8180x.c b/drivers/clk/qcom/gcc-sc8180x.c > index f9f3e1254ce1..e85e75792ac3 100644 > --- a/drivers/clk/qcom/gcc-sc8180x.c > +++ b/drivers/clk/qcom/gcc-sc8180x.c > @@ -974,7 +974,7 @@ static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { > F(25000000, P_GPLL0_OUT_MAIN, 12, 1, 2), > F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0), > F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0), > - F(200000000, P_GPLL0_OUT_MAIN, 3, 0, 0), > + F(202000000, P_GPLL9_OUT_MAIN, 4, 0, 0), > { } > }; > > @@ -997,9 +997,8 @@ static const struct freq_tbl ftbl_gcc_sdcc4_apps_clk_src[] = { > F(400000, P_BI_TCXO, 12, 1, 4), > F(9600000, P_BI_TCXO, 2, 0, 0), > F(19200000, P_BI_TCXO, 1, 0, 0), > - F(37500000, P_GPLL0_OUT_MAIN, 16, 0, 0), > F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0), > - F(75000000, P_GPLL0_OUT_MAIN, 8, 0, 0), > + F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0), > { } > }; > > > -- > 2.25.1 >
diff --git a/drivers/clk/qcom/gcc-sc8180x.c b/drivers/clk/qcom/gcc-sc8180x.c index f9f3e1254ce1..e85e75792ac3 100644 --- a/drivers/clk/qcom/gcc-sc8180x.c +++ b/drivers/clk/qcom/gcc-sc8180x.c @@ -974,7 +974,7 @@ static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { F(25000000, P_GPLL0_OUT_MAIN, 12, 1, 2), F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0), F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0), - F(200000000, P_GPLL0_OUT_MAIN, 3, 0, 0), + F(202000000, P_GPLL9_OUT_MAIN, 4, 0, 0), { } }; @@ -997,9 +997,8 @@ static const struct freq_tbl ftbl_gcc_sdcc4_apps_clk_src[] = { F(400000, P_BI_TCXO, 12, 1, 4), F(9600000, P_BI_TCXO, 2, 0, 0), F(19200000, P_BI_TCXO, 1, 0, 0), - F(37500000, P_GPLL0_OUT_MAIN, 16, 0, 0), F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0), - F(75000000, P_GPLL0_OUT_MAIN, 8, 0, 0), + F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0), { } };
Update the frequency tables of gcc_sdcc2_apps_clk and gcc_sdcc4_apps_clk as per the latest frequency plan. Fixes: 4433594bbe5d ("clk: qcom: gcc: Add global clock controller driver for SC8180x") Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> --- drivers/clk/qcom/gcc-sc8180x.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)