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Mon, 26 Aug 2024 08:04:40 +0000 Received: from NTZPR01MB0956.CHNPR01.prod.partner.outlook.cn ([fe80::40dc:d70a:7a0b:3f92]) by NTZPR01MB0956.CHNPR01.prod.partner.outlook.cn ([fe80::40dc:d70a:7a0b:3f92%5]) with mapi id 15.20.7897.021; Mon, 26 Aug 2024 08:04:40 +0000 From: Xingyu Wu To: Michael Turquette , Stephen Boyd , Conor Dooley , Emil Renner Berthing Cc: Hal Feng , Xingyu Wu , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v7 2/2] riscv: dts: starfive: jh7110-common: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz Date: Mon, 26 Aug 2024 16:04:30 +0800 Message-Id: <20240826080430.179788-3-xingyu.wu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240826080430.179788-1-xingyu.wu@starfivetech.com> References: <20240826080430.179788-1-xingyu.wu@starfivetech.com> X-ClientProxiedBy: ZQ0PR01CA0013.CHNPR01.prod.partner.outlook.cn (10.2.0.72) To NTZPR01MB0956.CHNPR01.prod.partner.outlook.cn (10.2.8.138) Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: NTZPR01MB0956:EE_|NTZPR01MB1034:EE_ X-MS-Office365-Filtering-Correlation-Id: 4753fa66-a48a-4d8e-cb43-08dcc5a5bc5f X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|41320700013|52116014|1800799024|38350700014; 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But now PLL0 rate is 1GHz and the cpu frequency loads become 250/333/500/1000MHz in fact. The PLL0 rate should be default set to 1.5GHz and set the cpu_core rate to 500MHz in safe. Fixes: e2c510d6d630 ("riscv: dts: starfive: Add cpu scaling for JH7110 SoC") Signed-off-by: Xingyu Wu Reviewed-by: Hal Feng --- arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi index ca2d44d59d48..c7771b3b6475 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi @@ -365,6 +365,12 @@ spi_dev0: spi@0 { }; }; +&syscrg { + assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>, + <&pllclk JH7110_PLLCLK_PLL0_OUT>; + assigned-clock-rates = <500000000>, <1500000000>; +}; + &sysgpio { i2c0_pins: i2c0-0 { i2c-pins {