diff mbox series

[v2] clk: samsung: fsd: Mark PLL_CAM_CSI as critical

Message ID 20240919123954.33000-1-inbaraj.e@samsung.com (mailing list archive)
State Changes Requested, archived
Headers show
Series [v2] clk: samsung: fsd: Mark PLL_CAM_CSI as critical | expand

Commit Message

Inbaraj E Sept. 19, 2024, 12:39 p.m. UTC
PLL_CAM_CSI is the parent clock for the ACLK and PCLK in the CMU_CAM_CSI
block. When we gate ACLK or PCLK, the clock framework will subsequently
disables the parent clocks(PLL_CAM_CSI). Disabling PLL_CAM_CSI is causing
system level halt.

It was observed on FSD SoC, when we gate the ACLK and PCLK during CSI stop
streaming through pm_runtime_put system is getting halted. So marking
PLL_CAM_CSI as critical to prevent disabling.

Fixes: b826c3e4de1a ("clk: samsung: fsd: Add cam_csi block clock information")
Signed-off-by: Inbaraj E <inbaraj.e@samsung.com>
---
 drivers/clk/samsung/clk-fsd.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

Comments

Krzysztof Kozlowski Sept. 20, 2024, 12:43 p.m. UTC | #1
On 19/09/2024 14:39, Inbaraj E wrote:
> PLL_CAM_CSI is the parent clock for the ACLK and PCLK in the CMU_CAM_CSI
> block. When we gate ACLK or PCLK, the clock framework will subsequently
> disables the parent clocks(PLL_CAM_CSI). Disabling PLL_CAM_CSI is causing
> system level halt.
> 
> It was observed on FSD SoC, when we gate the ACLK and PCLK during CSI stop
> streaming through pm_runtime_put system is getting halted. So marking
> PLL_CAM_CSI as critical to prevent disabling.

No, please do not send new versions while discussion is going.

See my replies in previous version.

Also, if this stays, then you miss Cc-stable.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/drivers/clk/samsung/clk-fsd.c b/drivers/clk/samsung/clk-fsd.c
index 6f984cfcd33c..d62981e4b1d6 100644
--- a/drivers/clk/samsung/clk-fsd.c
+++ b/drivers/clk/samsung/clk-fsd.c
@@ -1637,8 +1637,13 @@  static const struct samsung_pll_rate_table pll_cam_csi_rate_table[] __initconst
 };
 
 static const struct samsung_pll_clock cam_csi_pll_clks[] __initconst = {
-	PLL(pll_142xx, 0, "fout_pll_cam_csi", "fin_pll",
-	    PLL_LOCKTIME_PLL_CAM_CSI, PLL_CON0_PLL_CAM_CSI, pll_cam_csi_rate_table),
+	/*
+	 * PLL_CAM_CSI will never be turned off because PLL_CAM_CSI is
+	 * supplying clock to CMU SFR of CAM_CSI block.
+	 */
+	__PLL(pll_142xx, 0, "fout_pll_cam_csi", "fin_pll",
+		CLK_GET_RATE_NOCACHE | CLK_IS_CRITICAL, PLL_LOCKTIME_PLL_CAM_CSI,
+		PLL_CON0_PLL_CAM_CSI, pll_cam_csi_rate_table),
 };
 
 PNAME(mout_cam_csi_pll_p) = { "fin_pll", "fout_pll_cam_csi" };