@@ -41,6 +41,7 @@ properties:
- qcom,x1e80100-qmp-gen3x2-pcie-phy
- qcom,x1e80100-qmp-gen4x2-pcie-phy
- qcom,x1e80100-qmp-gen4x4-pcie-phy
+ - qcom,x1e80100-qmp-gen4x8-pcie-phy
reg:
minItems: 1
@@ -172,6 +173,7 @@ allOf:
- qcom,sc8280xp-qmp-gen3x2-pcie-phy
- qcom,sc8280xp-qmp-gen3x4-pcie-phy
- qcom,x1e80100-qmp-gen4x4-pcie-phy
+ - qcom,x1e80100-qmp-gen4x8-pcie-phy
then:
properties:
clocks:
@@ -201,6 +203,7 @@ allOf:
- qcom,sm8550-qmp-gen4x2-pcie-phy
- qcom,sm8650-qmp-gen4x2-pcie-phy
- qcom,x1e80100-qmp-gen4x2-pcie-phy
+ - qcom,x1e80100-qmp-gen4x8-pcie-phy
then:
properties:
resets:
PCIe 3rd instance of X1E80100 supports Gen 4 x8 which needs different 8 lane capable QMP PCIe PHY with hardware revision v6.30. Document Gen 4 x8 PHY as separate module. Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com> --- .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 3 +++ 1 file changed, 3 insertions(+)