From patchwork Wed Oct 9 07:41:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manikanta Mylavarapu X-Patchwork-Id: 13827659 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04FCE18660F; Wed, 9 Oct 2024 07:42:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728459768; cv=none; b=JWqTJzBTYlc9gDxEocjZgXfrp9glV1LFYqMopEWC1/YkBs1TbLGIRxEoexWEHjXrmUTGDk3lk/WHpp4p7ePgajLAne9jbK5RQsx+GeEHhz48aZyUhnREVAQxz1Or2JSTu7AjEOEc9i1vrsZpOk39fqx8J7mHWTkwINlh3cl2vFY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728459768; c=relaxed/simple; bh=YRQrZaIswrce40gFhroOibFAeYcUI3QN8KBvVGR5vuw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jT03PB2cqRUf/2zLO+45w4vUMivccZ9Sqo5Na/LyD5ls/eb+i7FtmquP4eIua9gQDJP6rdBW8GllxxyoKT9oVkkw9uFAGN6pFyxv8XDBNPJ33TdH7c32Ykis8dLV0KMUTHaa3wiVKhp60VKpAUgGUAdFGL3axzyF0mdhHsW2zAY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=R4lkosjZ; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="R4lkosjZ" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 498LWT2j006638; Wed, 9 Oct 2024 07:42:29 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 1qEGzXb+kb4tRFrRvWABa3SQs7Z81NbWZE8Chm59XLA=; b=R4lkosjZLDVveA8r Z4MCO0tg/YKrY0rtH73nNVckgj+UFwqPl18YSB82mynq6EcEACoiM/Q5pYRQkzd7 tSjZdr2u//Q17OZZYzjo/Z7vglB3spM95QeqhLYdHfWMjlq3JDpSyFeC32TRHfPy 0fEevTunCqQQFKZ+BEvvHXJqEguTNPxK0IVWYd7mWAPBA/gRAkBMB5wxCi5KMLkE +S62dOg9gK6eH/zH2jmWV2GzvzBJ0nWEu79X9oWsnIFEeMPv6ObmNdBNsuS838Tp /rmR6V2P0u+Rnxnbev9vBTnH9ONmYumLoTvZaNTLLvWsaDVxJ/7ySllSrFJizLwR 95XiRA== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 424cy7efxm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 09 Oct 2024 07:42:29 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4997gRIf008494 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 9 Oct 2024 07:42:27 GMT Received: from hu-mmanikan-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 9 Oct 2024 00:42:20 -0700 From: Manikanta Mylavarapu To: , , , , , , , , , , , , , , , , , , , , , , , CC: , Subject: [PATCH v7 5/6] arm64: dts: qcom: ipq9574: Add nsscc node Date: Wed, 9 Oct 2024 13:11:24 +0530 Message-ID: <20241009074125.794997-6-quic_mmanikan@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241009074125.794997-1-quic_mmanikan@quicinc.com> References: <20241009074125.794997-1-quic_mmanikan@quicinc.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: U5GvZh60cqpCnQ0sKQlT7RhLqxdCpjeC X-Proofpoint-GUID: U5GvZh60cqpCnQ0sKQlT7RhLqxdCpjeC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 adultscore=0 mlxscore=0 lowpriorityscore=0 suspectscore=0 spamscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 malwarescore=0 mlxlogscore=980 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410090050 From: Devi Priya Add a node for the nss clock controller found on ipq9574 based devices. Signed-off-by: Devi Priya Signed-off-by: Manikanta Mylavarapu --- Changes in V7: - Remove bias_pll_cc_clk, bias_pll_nss_noc_clk, bias_pll_ubi_nc_clk nodes from DTS. Because these clocks will be enabled by CMN PLL [1]. Until the CMN PLL driver posted with these clocks set these entries to 0 in the nsscc node. 1: https://lore.kernel.org/lkml/20240827-qcom_ipq_cmnpll-v3-0-8e009cece8b2@quicinc.com/ - Fixed the title - Drop R-b tag arch/arm64/boot/dts/qcom/ipq9574.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 14c7b3a78442..092f98b10a43 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -11,6 +11,8 @@ #include #include #include +#include +#include #include / { @@ -756,6 +758,27 @@ frame@b128000 { status = "disabled"; }; }; + + nsscc: clock-controller@39b00000 { + compatible = "qcom,ipq9574-nsscc"; + reg = <0x39b00000 0x80000>; + clocks = <&xo_board_clk>, + <0>, + <0>, + <0>, + <&gcc GPLL0_OUT_AUX>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <&gcc GCC_NSSCC_CLK>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + #interconnect-cells = <1>; + }; }; thermal-zones {