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[2001:14ba:a0c3:3a00:70b:e6fc:b322:6a1b]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53a00007078sm821563e87.212.2024.10.17.09.57.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2024 09:57:26 -0700 (PDT) From: Dmitry Baryshkov Date: Thu, 17 Oct 2024 19:57:02 +0300 Subject: [PATCH 12/14] clk: qcom: tcsrcc-sm8550: add SAR2130P support Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241017-sar2130p-clocks-v1-12-f75e740f0a8d@linaro.org> References: <20241017-sar2130p-clocks-v1-0-f75e740f0a8d@linaro.org> In-Reply-To: <20241017-sar2130p-clocks-v1-0-f75e740f0a8d@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Neil Armstrong , Philipp Zabel , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2325; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=TNWk6Nhecl+MK70lQyzmpY0MvdOLmTWgfNITHOR69g0=; b=owEBbQKS/ZANAwAKARTbcu2+gGW4AcsmYgBnEUHduuavViRPGO9hBvHp15ol0VSkgMtR1sbtk kBJ2m2rcz2JAjMEAAEKAB0WIQRdB85SOKWMgfgVe+4U23LtvoBluAUCZxFB3QAKCRAU23LtvoBl uMAPD/42e2/3+kk/kt5jWcY6UjJF0zZtDNqmqeP0+k4lx/TXVR6OcS25I2vfciw91ppiCpQlsku ICt3re/0sy1IX0Dqo551NnZ6P5q3fefLp4vl0RnpAS9jx8BIH5uHPwSue3v4tGv7+MkGRBdoh/H +Cz2eDA2hA1T4CZppp3+cnN8YtM+dR3OUDpW5dm37ad0ZPun7YvOZcgBV5VZgVjbi4liTCh+Dl9 GV1fjdINF3W6DWFLpqu45KiYGCNNqv/JmnCkhkaBNAz0wihuMPrXV0t7hjwmshn3AY9HDlu6qYB Hp2u761lroVf4qiAj2x6T1weTPJYY+J/CONG8U9Mia5KRiYLKcBuMKo2zcRs+fzAZYxny8huAoq qXMlizQWN3o9sHnUiE/WxqEHUMZKMo5Zo3+eDzeZNkp6ipNFi91v/BK164RbtsO5lfLt+kq/UQQ I3eBVGIJ5HWsUfigRksDi28TOja+07XuUf8dR7u3aYZb8kataVOZrIGKsAQ2jEaZcHexdI2ev7h TlomWUHWqOhY+s8TKyf0O7Gr1DtBi+YvBUSTp7I6r0bKUQmuiRL4RSNowXEMUkxEyeL3hh2Sx8+ jQvVOKMUYLz3PXqibMRQafI9aqv3KaO8XTyHXN75k6bdLg5w7UQHnknMtpNwWQh9Pk8NYIx4WU+ Ci8Hrn5YO6PAyoQ== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The SAR2130P platform has the same TCSR Clock Controller as the SM8550, except for the lack of the UFS clocks. Extend the SM8550 TCSRCC driver to support SAR2130P. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/clk/qcom/tcsrcc-sm8550.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/tcsrcc-sm8550.c b/drivers/clk/qcom/tcsrcc-sm8550.c index e5e8f2e82b949dae592ec3dda585138bf89cab37..41d73f92a000ab924560a0c2c9d8e85a9aaeb1b0 100644 --- a/drivers/clk/qcom/tcsrcc-sm8550.c +++ b/drivers/clk/qcom/tcsrcc-sm8550.c @@ -129,6 +129,13 @@ static struct clk_branch tcsr_usb3_clkref_en = { }, }; +static struct clk_regmap *tcsr_cc_sar2130p_clocks[] = { + [TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr, + [TCSR_PCIE_1_CLKREF_EN] = &tcsr_pcie_1_clkref_en.clkr, + [TCSR_USB2_CLKREF_EN] = &tcsr_usb2_clkref_en.clkr, + [TCSR_USB3_CLKREF_EN] = &tcsr_usb3_clkref_en.clkr, +}; + static struct clk_regmap *tcsr_cc_sm8550_clocks[] = { [TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr, [TCSR_PCIE_1_CLKREF_EN] = &tcsr_pcie_1_clkref_en.clkr, @@ -146,6 +153,12 @@ static const struct regmap_config tcsr_cc_sm8550_regmap_config = { .fast_io = true, }; +static const struct qcom_cc_desc tcsr_cc_sar2130p_desc = { + .config = &tcsr_cc_sm8550_regmap_config, + .clks = tcsr_cc_sar2130p_clocks, + .num_clks = ARRAY_SIZE(tcsr_cc_sar2130p_clocks), +}; + static const struct qcom_cc_desc tcsr_cc_sm8550_desc = { .config = &tcsr_cc_sm8550_regmap_config, .clks = tcsr_cc_sm8550_clocks, @@ -153,7 +166,8 @@ static const struct qcom_cc_desc tcsr_cc_sm8550_desc = { }; static const struct of_device_id tcsr_cc_sm8550_match_table[] = { - { .compatible = "qcom,sm8550-tcsr" }, + { .compatible = "qcom,sar2130p-tcsr", .data = &tcsr_cc_sar2130p_desc }, + { .compatible = "qcom,sm8550-tcsr", .data = &tcsr_cc_sm8550_desc }, { } }; MODULE_DEVICE_TABLE(of, tcsr_cc_sm8550_match_table); @@ -162,7 +176,7 @@ static int tcsr_cc_sm8550_probe(struct platform_device *pdev) { struct regmap *regmap; - regmap = qcom_cc_map(pdev, &tcsr_cc_sm8550_desc); + regmap = qcom_cc_map(pdev, of_device_get_match_data(&pdev->dev)); if (IS_ERR(regmap)) return PTR_ERR(regmap);