Message ID | 20241106-qcs8300-mm-patches-v3-1-f611a8f87f15@quicinc.com (mailing list archive) |
---|---|
State | Awaiting Upstream, archived |
Headers | show |
Series | Add support for GPUCC, CAMCC and VIDEOCC on Qualcomm QCS8300 platform | expand |
On Wed, Nov 06, 2024 at 03:21:56PM +0530, Imran Shaik wrote: > The QCS8300 GPU clock controller is mostly identical to SA8775P, but > QCS8300 has few additional clocks and minor differences. Hence, reuse > SA8775P gpucc bindings and add additional clocks required for QCS8300. > > Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> > --- > Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 3 +++ > include/dt-bindings/clock/qcom,qcs8300-gpucc.h | 17 +++++++++++++++++ > 2 files changed, 20 insertions(+) > That's a bit unusual, I think none of other SoCs do it. Last time you brought existing example which used the same header and prefixes. Anyway, it's fine from DT point of view, if that's what SoC/clock maintainers want so: Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index 0858fd635282..4cdff6161bf0 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -8,6 +8,7 @@ title: Qualcomm Graphics Clock & Reset Controller maintainers: - Taniya Das <quic_tdas@quicinc.com> + - Imran Shaik <quic_imrashai@quicinc.com> description: | Qualcomm graphics clock control module provides the clocks, resets and power @@ -23,10 +24,12 @@ description: | include/dt-bindings/clock/qcom,gpucc-sm8150.h include/dt-bindings/clock/qcom,gpucc-sm8250.h include/dt-bindings/clock/qcom,gpucc-sm8350.h + include/dt-bindings/clock/qcom,qcs8300-gpucc.h properties: compatible: enum: + - qcom,qcs8300-gpucc - qcom,sdm845-gpucc - qcom,sa8775p-gpucc - qcom,sc7180-gpucc diff --git a/include/dt-bindings/clock/qcom,qcs8300-gpucc.h b/include/dt-bindings/clock/qcom,qcs8300-gpucc.h new file mode 100644 index 000000000000..afa187467b4c --- /dev/null +++ b/include/dt-bindings/clock/qcom,qcs8300-gpucc.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_GPUCC_QCS8300_H +#define _DT_BINDINGS_CLK_QCOM_GPUCC_QCS8300_H + +#include "qcom,sa8775p-gpucc.h" + +/* QCS8300 introduces below new clocks compared to SA8775P */ + +/* GPU_CC clocks */ +#define GPU_CC_CX_ACCU_SHIFT_CLK 23 +#define GPU_CC_GX_ACCU_SHIFT_CLK 24 + +#endif
The QCS8300 GPU clock controller is mostly identical to SA8775P, but QCS8300 has few additional clocks and minor differences. Hence, reuse SA8775P gpucc bindings and add additional clocks required for QCS8300. Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> --- Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 3 +++ include/dt-bindings/clock/qcom,qcs8300-gpucc.h | 17 +++++++++++++++++ 2 files changed, 20 insertions(+)