| Message ID | 20241220-amlogic-clk-gxbb-32k-fixes-v1-1-baca56ecf2db@baylibre.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | clk: amlogic: gxbb: 32k clock fixes | expand |
On 20/12/2024 11:25, Jerome Brunet wrote: > gxbb_32k_clk_div sets CLK_DIVIDER_ROUND_CLOSEST in the init_data flag which > is incorrect. This is field is not where the divider flags belong. > > Thankfully, CLK_DIVIDER_ROUND_CLOSEST maps to bit 4 which is an unused > clock flag, so there is no unintended consequence to this error. > > Effectively, the clock has been used without CLK_DIVIDER_ROUND_CLOSEST > so far, so just drop it. > > Fixes: 14c735c8e308 ("clk: meson-gxbb: Add EE 32K Clock for CEC") > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> > --- > drivers/clk/meson/gxbb.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c > index 262c318edbd512239b79e5ad26643ae6c7b0173b..62494cf06e7d775bdb18b2242c3d45bf246bdd0e 100644 > --- a/drivers/clk/meson/gxbb.c > +++ b/drivers/clk/meson/gxbb.c > @@ -1306,7 +1306,7 @@ static struct clk_regmap gxbb_32k_clk_div = { > &gxbb_32k_clk_sel.hw > }, > .num_parents = 1, > - .flags = CLK_SET_RATE_PARENT | CLK_DIVIDER_ROUND_CLOSEST, > + .flags = CLK_SET_RATE_PARENT, > }, > }; > > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c index 262c318edbd512239b79e5ad26643ae6c7b0173b..62494cf06e7d775bdb18b2242c3d45bf246bdd0e 100644 --- a/drivers/clk/meson/gxbb.c +++ b/drivers/clk/meson/gxbb.c @@ -1306,7 +1306,7 @@ static struct clk_regmap gxbb_32k_clk_div = { &gxbb_32k_clk_sel.hw }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_DIVIDER_ROUND_CLOSEST, + .flags = CLK_SET_RATE_PARENT, }, };
gxbb_32k_clk_div sets CLK_DIVIDER_ROUND_CLOSEST in the init_data flag which is incorrect. This is field is not where the divider flags belong. Thankfully, CLK_DIVIDER_ROUND_CLOSEST maps to bit 4 which is an unused clock flag, so there is no unintended consequence to this error. Effectively, the clock has been used without CLK_DIVIDER_ROUND_CLOSEST so far, so just drop it. Fixes: 14c735c8e308 ("clk: meson-gxbb: Add EE 32K Clock for CEC") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- drivers/clk/meson/gxbb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)