@@ -29,12 +29,12 @@ properties:
maxItems: 2
clocks:
- minItems: 6
- maxItems: 7
+ minItems: 7
+ maxItems: 10
clock-names:
- minItems: 6
- maxItems: 7
+ minItems: 7
+ maxItems: 10
'#clock-cells':
const: 1
@@ -86,6 +86,10 @@ allOf:
- description: ext2 clock input
- description: ext3 clock input
- description: ext4 clock input
+ - description: audio1 PLL input
+ - description: audio2 PLL input
+ - description: dram PLL input
+ - description: video PLL input
clock-names:
items:
@@ -95,20 +99,31 @@ allOf:
- const: clk_ext2
- const: clk_ext3
- const: clk_ext4
+ - const: audio_pll1
+ - const: audio_pll2
+ - const: dram_pll
+ - const: video_pll
additionalProperties: false
examples:
# Clock Control Module node:
- |
+ #include <dt-bindings/clock/imx8mm-clock.h>
+
clock-controller@30380000 {
compatible = "fsl,imx8mm-ccm";
reg = <0x30380000 0x10000>;
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
- <&clk_ext3>, <&clk_ext4>;
+ <&clk_ext3>, <&clk_ext4>,
+ <&anatop IMX8MM_ANATOP_AUDIO_PLL1>,
+ <&anatop IMX8MM_ANATOP_AUDIO_PLL1>,
+ <&anatop IMX8MM_ANATOP_DRAM_PLL>,
+ <&anatop IMX8MM_ANATOP_VIDEO_PLL>;
clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
- "clk_ext3", "clk_ext4";
+ "clk_ext3", "clk_ext4", "audio_pll1", "audio_pll2",
+ "dram_pll", "video_pll";
};
- |
Though adding the PLLs to clocks and clock-names properties will break the ABI, it is required to accurately describe the hardware. Indeed, the Clock Control Module (CCM) receives clocks from the PLLs and oscillators and generates clocks for on-chip peripherals. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> --- Changes in v6: - New .../bindings/clock/imx8m-clock.yaml | 27 ++++++++++++++----- 1 file changed, 21 insertions(+), 6 deletions(-)