| Message ID | 20250102170359.761670-3-rohit.visavalia@amd.com (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | clk: xilinx: vcu: Sequence update and couple of fixes | expand |
Hi Rohit, On Thu, Jan 2, 2025 at 6:04 PM Rohit Visavalia <rohit.visavalia@amd.com> wrote: > CCF will try to adjust parent clock to set desire clock frequency of > child clock. So if pll_ref is not a fixed-clock then while setting rate > of enc/dec clocks pll_ref may get change, which may make VCU malfunction. > > Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com> > --- > Changes in v2: > - none > - Link to v1: https://lore.kernel.org/linux-clk/20241226122023.3439559-3-rohit.visavalia@amd.com > --- > drivers/clk/xilinx/xlnx_vcu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/xilinx/xlnx_vcu.c b/drivers/clk/xilinx/xlnx_vcu.c > index 88b3fd8250c2..c520ae1ba65e 100644 > --- a/drivers/clk/xilinx/xlnx_vcu.c > +++ b/drivers/clk/xilinx/xlnx_vcu.c > @@ -547,7 +547,7 @@ static int xvcu_register_clock_provider(struct xvcu_device *xvcu) > return PTR_ERR(hw); > xvcu->pll_post = hw; > > - parent_data[0].fw_name = "pll_ref"; > + parent_data[0].fw_name = "dummy_name"; > parent_data[1].hw = xvcu->pll_post; > > hws[CLK_XVCU_ENC_CORE] = You completely ignored Stephen's comment, which suggests to not pas CLK_SET_RATE_PARENT instead (see xvcu_clk_hw_register_leaf()). Gr{oetje,eeting}s, Geert
Hi Geert, Thank for the review. >-----Original Message----- >From: Geert Uytterhoeven <geert@linux-m68k.org> >Sent: Friday, January 3, 2025 12:58 AM >To: Visavalia, Rohit <rohit.visavalia@amd.com> >Cc: mturquette@baylibre.com; sboyd@kernel.org; Simek, Michal ><michal.simek@amd.com>; Sagar, Vishal <vishal.sagar@amd.com>; >javier.carrasco.cruz@gmail.com; geert+renesas@glider.be; u.kleine- >koenig@baylibre.com; linux-clk@vger.kernel.org; linux-arm- >kernel@lists.infradead.org; linux-kernel@vger.kernel.org >Subject: Re: [PATCH v2 2/3] clk: xilinx: vcu: don't set pll_ref as parent of >VCU(enc/dec) clocks > >Hi Rohit, > >On Thu, Jan 2, 2025 at 6:04 PM Rohit Visavalia <rohit.visavalia@amd.com> wrote: >> CCF will try to adjust parent clock to set desire clock frequency of >> child clock. So if pll_ref is not a fixed-clock then while setting >> rate of enc/dec clocks pll_ref may get change, which may make VCU >malfunction. >> >> Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com> >> --- >> Changes in v2: >> - none >> - Link to v1: >> https://lore.kernel.org/linux-clk/20241226122023.3439559-3-rohit.visav >> alia@amd.com >> --- >> drivers/clk/xilinx/xlnx_vcu.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/clk/xilinx/xlnx_vcu.c >> b/drivers/clk/xilinx/xlnx_vcu.c index 88b3fd8250c2..c520ae1ba65e >> 100644 >> --- a/drivers/clk/xilinx/xlnx_vcu.c >> +++ b/drivers/clk/xilinx/xlnx_vcu.c >> @@ -547,7 +547,7 @@ static int xvcu_register_clock_provider(struct >xvcu_device *xvcu) >> return PTR_ERR(hw); >> xvcu->pll_post = hw; >> >> - parent_data[0].fw_name = "pll_ref"; >> + parent_data[0].fw_name = "dummy_name"; >> parent_data[1].hw = xvcu->pll_post; >> >> hws[CLK_XVCU_ENC_CORE] = > >You completely ignored Stephen's comment, which suggests to not pas >CLK_SET_RATE_PARENT instead (see xvcu_clk_hw_register_leaf()). Thanks for pointing this out. Let me take care this in v3 patch series. > >Gr{oetje,eeting}s, > > Geert > >-- >Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > >In personal conversations with technical people, I call myself a hacker. But when >I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds Thanks Rohit
diff --git a/drivers/clk/xilinx/xlnx_vcu.c b/drivers/clk/xilinx/xlnx_vcu.c index 88b3fd8250c2..c520ae1ba65e 100644 --- a/drivers/clk/xilinx/xlnx_vcu.c +++ b/drivers/clk/xilinx/xlnx_vcu.c @@ -547,7 +547,7 @@ static int xvcu_register_clock_provider(struct xvcu_device *xvcu) return PTR_ERR(hw); xvcu->pll_post = hw; - parent_data[0].fw_name = "pll_ref"; + parent_data[0].fw_name = "dummy_name"; parent_data[1].hw = xvcu->pll_post; hws[CLK_XVCU_ENC_CORE] =
CCF will try to adjust parent clock to set desire clock frequency of child clock. So if pll_ref is not a fixed-clock then while setting rate of enc/dec clocks pll_ref may get change, which may make VCU malfunction. Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com> --- Changes in v2: - none - Link to v1: https://lore.kernel.org/linux-clk/20241226122023.3439559-3-rohit.visavalia@amd.com --- drivers/clk/xilinx/xlnx_vcu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)