From patchwork Mon Jan 6 14:21:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ahmad Fatoum X-Patchwork-Id: 13927529 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BADFD1DF256 for ; Mon, 6 Jan 2025 14:22:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736173323; cv=none; b=ZfXz6iHgM/o59LoXuGf6Uqq/jwUta98EaU0SIhsAL/l6C6WY9IEPyQVdvd3sCNo0fenGuUgtCM+xXp8sO8+toR4J7wvws6+R0/NU0sUXKy7IUMOvTJ9cwPdv2n/mybGFFxBFir1YbNqd+eTdE6S9VLB05Mra2bI2M9cXI7W8kSU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736173323; c=relaxed/simple; bh=xsMNSiLsehQAQ6W+aIzNgv4jCYm8TLEXlYSXaxkaEpI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LDoT4TVO+72iDSrii2lk1ZSGEN8RxwXLn6r0B+0eb6RZnCcl1QtqrDAHgwAByUJWHdh+lBbMeAIPjbz1VUlaOu2V3TrRFLz4ads822lo+V1XHFZIRluw+PgFgDa3RYtnzGdbckODX4CcHubFDgZxkd+fUR61AiMvO9gQO/63dmU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1tUnzF-0003vP-E4; Mon, 06 Jan 2025 15:21:45 +0100 Received: from dude05.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::54]) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tUnzE-007BR0-0G; Mon, 06 Jan 2025 15:21:44 +0100 Received: from localhost ([::1] helo=dude05.red.stw.pengutronix.de) by dude05.red.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1tUnzE-008rLw-2W; Mon, 06 Jan 2025 15:21:44 +0100 From: Ahmad Fatoum Date: Mon, 06 Jan 2025 15:21:42 +0100 Subject: [PATCH v2 1/6] dt-bindings: clock: imx8m: document nominal/overdrive properties Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250106-imx8m-clk-v2-1-6aaeadac65fe@pengutronix.de> References: <20250106-imx8m-clk-v2-0-6aaeadac65fe@pengutronix.de> In-Reply-To: <20250106-imx8m-clk-v2-0-6aaeadac65fe@pengutronix.de> To: Abel Vesa , Peng Fan , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Abel Vesa , Marek Vasut Cc: linux-clk@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Conor Dooley , Ahmad Fatoum X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: a.fatoum@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-clk@vger.kernel.org The imx8m-clock.yaml binding covers the clock controller inside all of the i.MX8M Q/M/N/P SoCs. All of them have in common that they support two operating modes: nominal and overdrive mode. While the overdrive mode allows for higher frequencies for many IPs, the nominal mode needs a lower SoC voltage, thereby reducing heat generation and power usage. As increasing clock rates beyond the maximum permitted by the supplied SoC voltage can lead to difficult to debug issues, device tree consumers would benefit from knowing what mode is active to enforce the clock rate limits that come with it. To facilitate this, extend the clock controller bindings with two mutually exclusive optional properties. Allowing for absence of both properties is needed, because there is no default suitable for all boards: For i.MX8M Mini and Nano, the kernel SoC DTSIs has assigned-clock-rates that are all achievable in nominal mode. For i.MX8MP, there are some rates only validated for overdrive mode. But even for the i.MX8M Mini/Nano boards, we don't know what rates they may configure at runtime, so it has not been possible so far to infer from just the device tree what the mode is. Acked-by: Conor Dooley Signed-off-by: Ahmad Fatoum --- Documentation/devicetree/bindings/clock/imx8m-clock.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml index c643d4a814786a1fc7e559140fe58911990f71bb..a6ae5257ef531f3fa8506d515d202f5b7842c4fa 100644 --- a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml @@ -43,6 +43,14 @@ properties: ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h for the full list of i.MX8M clock IDs. + fsl,nominal-mode: + description: Set if SoC is operated in nominal mode + $ref: /schemas/types.yaml#/definitions/flag + + fsl,overdrive-mode: + description: Set if SoC is operated in overdrive mode + $ref: /schemas/types.yaml#/definitions/flag + required: - compatible - reg @@ -95,6 +103,12 @@ allOf: - const: clk_ext2 - const: clk_ext3 - const: clk_ext4 + - if: + required: + - fsl,overdrive-mode + then: + properties: + fsl,nominal-mode: false additionalProperties: false