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Thu, 9 Jan 2025 07:50:44 -0500 (EST) From: =?utf-8?q?Niklas_S=C3=B6derlund?= To: Geert Uytterhoeven , Jacopo Mondi , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org Cc: =?utf-8?q?Niklas_S=C3=B6derlund?= Subject: [PATCH] clk: renesas: r8a779a0: Add FCPVX clocks Date: Thu, 9 Jan 2025 13:50:36 +0100 Message-ID: <20250109125036.2399199-1-niklas.soderlund+renesas@ragnatech.se> X-Mailer: git-send-email 2.47.1 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the FCPVX modules clock for Renesas R-Car V3U. Signed-off-by: Niklas Söderlund --- drivers/clk/renesas/r8a779a0-cpg-mssr.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c index 9c7e4094705c..4a5b4e2afa92 100644 --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -238,6 +238,10 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { DEF_MOD("vspx1", 1029, R8A779A0_CLK_S1D1), DEF_MOD("vspx2", 1030, R8A779A0_CLK_S1D1), DEF_MOD("vspx3", 1031, R8A779A0_CLK_S1D1), + DEF_MOD("fcpvx0", 1100, R8A779A0_CLK_S1D1), + DEF_MOD("fcpvx1", 1101, R8A779A0_CLK_S1D1), + DEF_MOD("fcpvx2", 1102, R8A779A0_CLK_S1D1), + DEF_MOD("fcpvx3", 1103, R8A779A0_CLK_S1D1), }; static const unsigned int r8a779a0_crit_mod_clks[] __initconst = {