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[88.10.54.249]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bddbf50a2sm7440771f8f.43.2025.01.15.07.30.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 07:30:29 -0800 (PST) From: Sergio Paracuellos To: linux-clk@vger.kernel.org Cc: sboyd@kernel.org, mturquette@baylibre.com, tsbogend@alpha.franken.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, p.zabel@pengutronix.de, linux-mips@vger.kernel.org, devicetree@vger.kernel.org, yangshiji66@outlook.com, linux-kernel@vger.kernel.org Subject: [PATCH 6/6] mips: dts: ralink: mt7628a: update system controller node and its consumers Date: Wed, 15 Jan 2025 16:30:19 +0100 Message-Id: <20250115153019.407646-7-sergio.paracuellos@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250115153019.407646-1-sergio.paracuellos@gmail.com> References: <20250115153019.407646-1-sergio.paracuellos@gmail.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Current MT7628A device tree file is out of date and must be merged with real device tree file used in openWRT project [0]. As a first iteration for this changes, align the current file with the needed changes for system controller from '6f3b15586eef ("clk: ralink: add clock and reset driver for MTMIPS SoCs")'. [0]: https://github.com/openwrt/openwrt/blob/main/target/linux/ramips/dts/mt7628an.dtsi Signed-off-by: Sergio Paracuellos --- arch/mips/boot/dts/ralink/mt7628a.dtsi | 43 ++++++++++++++++---------- 1 file changed, 27 insertions(+), 16 deletions(-) diff --git a/arch/mips/boot/dts/ralink/mt7628a.dtsi b/arch/mips/boot/dts/ralink/mt7628a.dtsi index 45a15e005cc4..bc69866e2134 100644 --- a/arch/mips/boot/dts/ralink/mt7628a.dtsi +++ b/arch/mips/boot/dts/ralink/mt7628a.dtsi @@ -1,4 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 +#include +#include / { #address-cells = <1>; @@ -16,11 +18,6 @@ cpu@0 { }; }; - resetc: reset-controller { - compatible = "ralink,rt2880-reset"; - #reset-cells = <1>; - }; - cpuintc: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; @@ -36,9 +33,11 @@ palmbus@10000000 { #address-cells = <1>; #size-cells = <1>; - sysc: system-controller@0 { - compatible = "ralink,mt7620a-sysc", "syscon"; + sysc: syscon@0 { + compatible = "ralink,mt7628-sysc", "syscon"; reg = <0x0 0x60>; + #clock-cells = <1>; + #reset-cells = <1>; }; pinmux: pinmux@60 { @@ -138,7 +137,7 @@ watchdog: watchdog@100 { compatible = "mediatek,mt7621-wdt"; reg = <0x100 0x30>; - resets = <&resetc 8>; + resets = <&sysc MT76X8_RST_TIMER>; reset-names = "wdt"; interrupt-parent = <&intc>; @@ -154,7 +153,7 @@ intc: interrupt-controller@200 { interrupt-controller; #interrupt-cells = <1>; - resets = <&resetc 9>; + resets = <&sysc MT76X8_RST_INTC>; reset-names = "intc"; interrupt-parent = <&cpuintc>; @@ -190,7 +189,9 @@ spi: spi@b00 { pinctrl-names = "default"; pinctrl-0 = <&pinmux_spi_spi>; - resets = <&resetc 18>; + clocks = <&sysc MT76X8_CLK_SPI1>; + + resets = <&sysc MT76X8_RST_SPI>; reset-names = "spi"; #address-cells = <1>; @@ -206,7 +207,9 @@ i2c: i2c@900 { pinctrl-names = "default"; pinctrl-0 = <&pinmux_i2c_i2c>; - resets = <&resetc 16>; + clocks = <&sysc MT76X8_CLK_I2C>; + + resets = <&sysc MT76X8_RST_I2C>; reset-names = "i2c"; #address-cells = <1>; @@ -222,7 +225,9 @@ uart0: uartlite@c00 { pinctrl-names = "default"; pinctrl-0 = <&pinmux_uart0_uart>; - resets = <&resetc 12>; + clocks = <&sysc MT76X8_CLK_UART0>; + + resets = <&sysc MT76X8_RST_UART0>; reset-names = "uart0"; interrupt-parent = <&intc>; @@ -238,7 +243,9 @@ uart1: uart1@d00 { pinctrl-names = "default"; pinctrl-0 = <&pinmux_uart1_uart>; - resets = <&resetc 19>; + clocks = <&sysc MT76X8_CLK_UART1>; + + resets = <&sysc MT76X8_RST_UART1>; reset-names = "uart1"; interrupt-parent = <&intc>; @@ -254,7 +261,9 @@ uart2: uart2@e00 { pinctrl-names = "default"; pinctrl-0 = <&pinmux_uart2_uart>; - resets = <&resetc 20>; + clocks = <&sysc MT76X8_CLK_UART2>; + + resets = <&sysc MT76X8_RST_UART2>; reset-names = "uart2"; interrupt-parent = <&intc>; @@ -271,8 +280,8 @@ usb_phy: usb-phy@10120000 { #phy-cells = <0>; ralink,sysctl = <&sysc>; - resets = <&resetc 22 &resetc 25>; - reset-names = "host", "device"; + resets = <&sysc MT76X8_RST_UHST>; + reset-names = "host"; }; usb@101c0000 { @@ -290,6 +299,8 @@ wmac: wmac@10300000 { compatible = "mediatek,mt7628-wmac"; reg = <0x10300000 0x100000>; + clocks = <&sysc MT76X8_CLK_WMAC>; + interrupt-parent = <&cpuintc>; interrupts = <6>;