@@ -1,4 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
+#include <dt-bindings/reset/mediatek,mtmips-sysc.h>
/ {
#address-cells = <1>;
@@ -16,11 +18,6 @@ cpu@0 {
};
};
- resetc: reset-controller {
- compatible = "ralink,rt2880-reset";
- #reset-cells = <1>;
- };
-
cpuintc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
@@ -36,9 +33,11 @@ palmbus@10000000 {
#address-cells = <1>;
#size-cells = <1>;
- sysc: system-controller@0 {
- compatible = "ralink,mt7620a-sysc", "syscon";
+ sysc: syscon@0 {
+ compatible = "ralink,mt7628-sysc", "syscon";
reg = <0x0 0x60>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
};
pinmux: pinmux@60 {
@@ -138,7 +137,7 @@ watchdog: watchdog@100 {
compatible = "mediatek,mt7621-wdt";
reg = <0x100 0x30>;
- resets = <&resetc 8>;
+ resets = <&sysc MT76X8_RST_TIMER>;
reset-names = "wdt";
interrupt-parent = <&intc>;
@@ -154,7 +153,7 @@ intc: interrupt-controller@200 {
interrupt-controller;
#interrupt-cells = <1>;
- resets = <&resetc 9>;
+ resets = <&sysc MT76X8_RST_INTC>;
reset-names = "intc";
interrupt-parent = <&cpuintc>;
@@ -190,7 +189,9 @@ spi: spi@b00 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_spi_spi>;
- resets = <&resetc 18>;
+ clocks = <&sysc MT76X8_CLK_SPI1>;
+
+ resets = <&sysc MT76X8_RST_SPI>;
reset-names = "spi";
#address-cells = <1>;
@@ -206,7 +207,9 @@ i2c: i2c@900 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_i2c_i2c>;
- resets = <&resetc 16>;
+ clocks = <&sysc MT76X8_CLK_I2C>;
+
+ resets = <&sysc MT76X8_RST_I2C>;
reset-names = "i2c";
#address-cells = <1>;
@@ -222,7 +225,9 @@ uart0: uartlite@c00 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_uart0_uart>;
- resets = <&resetc 12>;
+ clocks = <&sysc MT76X8_CLK_UART0>;
+
+ resets = <&sysc MT76X8_RST_UART0>;
reset-names = "uart0";
interrupt-parent = <&intc>;
@@ -238,7 +243,9 @@ uart1: uart1@d00 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_uart1_uart>;
- resets = <&resetc 19>;
+ clocks = <&sysc MT76X8_CLK_UART1>;
+
+ resets = <&sysc MT76X8_RST_UART1>;
reset-names = "uart1";
interrupt-parent = <&intc>;
@@ -254,7 +261,9 @@ uart2: uart2@e00 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_uart2_uart>;
- resets = <&resetc 20>;
+ clocks = <&sysc MT76X8_CLK_UART2>;
+
+ resets = <&sysc MT76X8_RST_UART2>;
reset-names = "uart2";
interrupt-parent = <&intc>;
@@ -271,8 +280,8 @@ usb_phy: usb-phy@10120000 {
#phy-cells = <0>;
ralink,sysctl = <&sysc>;
- resets = <&resetc 22 &resetc 25>;
- reset-names = "host", "device";
+ resets = <&sysc MT76X8_RST_UHST>;
+ reset-names = "host";
};
usb@101c0000 {
@@ -290,6 +299,8 @@ wmac: wmac@10300000 {
compatible = "mediatek,mt7628-wmac";
reg = <0x10300000 0x100000>;
+ clocks = <&sysc MT76X8_CLK_WMAC>;
+
interrupt-parent = <&cpuintc>;
interrupts = <6>;
Current MT7628A device tree file system controller node is wrong since it is not matching bindings. Hence, update it to match current bindings updating it also to use new introduced clock and reset constants. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> --- arch/mips/boot/dts/ralink/mt7628a.dtsi | 43 ++++++++++++++++---------- 1 file changed, 27 insertions(+), 16 deletions(-)