@@ -1,4 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
+
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -25,9 +27,11 @@ palmbus@300000 {
#address-cells = <1>;
#size-cells = <1>;
- sysc@0 {
- compatible = "ralink,rt2880-sysc";
+ sysc: syscon@0 {
+ compatible = "ralink,rt2880-sysc", "syscon";
reg = <0x0 0x100>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
};
intc: intc@200 {
@@ -50,6 +54,8 @@ uartlite@c00 {
compatible = "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
+ clocks = <&sysc RT2880_CLK_UARTLITE>;
+
interrupt-parent = <&intc>;
interrupts = <8>;
Current RT2880 device tree file system controller node is wrong since it is not matching bindings. Hence, update it to match current bindings updating it also to use new introduced clock constants. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> --- arch/mips/boot/dts/ralink/rt2880.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)