From patchwork Fri Feb 14 12:53:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 13974855 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8791B26560C; Fri, 14 Feb 2025 12:56:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739537772; cv=none; b=Vnw3ZU8Onzdydc8YdBq/q2tzGAk9Xr6begHlQkM8K4+ZTavGO0KEwEo5k/pYS2Sk/Kzicqot6aCtJa6Wc/6V0b0/Ueh9mw20oOxgfdPXhdtkpxeqab+p/z+EIcnb7n/uJL0VzMSiHsCB1HmRm3uZn2vd66Vx/OoRU82QAuqLB4U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739537772; c=relaxed/simple; bh=ACY+qaUpxTsk17SnEJMD5U89FbGXchWZtFHp1Vf20eo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ee/7PhZhmSXGBRQgnIlLSjGsAJLmy7cnPwv9HfppKTkoRfmJHzP0NbU8s0CNFCYEad7ujh0vi2LpbC23KNGLj5zYRIviMJxXtg7fwK2V+lFyznQITGDlPvzJswZZGh5STUdVJkDEF3YHmREQQQFXud8wY35D2+1aVQzZiHDjyTc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1E503113E; Fri, 14 Feb 2025 04:56:30 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E60563F58B; Fri, 14 Feb 2025 04:56:07 -0800 (PST) From: Andre Przywara To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Philipp Zabel , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 03/15] clk: sunxi-ng: mp: provide wrapper for setting feature flags Date: Fri, 14 Feb 2025 12:53:47 +0000 Message-ID: <20250214125359.5204-4-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.3 In-Reply-To: <20250214125359.5204-1-andre.przywara@arm.com> References: <20250214125359.5204-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 So far our sunxi clock instantiation macros set the required flags depending on the clock type, but the new "dual divider MP clock" requires us to pass that piece of information in by the user. Add a new wrapper macro that allows to specify a "features" field, to allow marking those dual-divider clocks accordingly. Signed-off-by: Andre Przywara Reviewed-by: Chen-Yu Tsai --- drivers/clk/sunxi-ng/ccu_mp.h | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu_mp.h b/drivers/clk/sunxi-ng/ccu_mp.h index e235fdfde2d36..687bd2ec798e2 100644 --- a/drivers/clk/sunxi-ng/ccu_mp.h +++ b/drivers/clk/sunxi-ng/ccu_mp.h @@ -100,11 +100,12 @@ struct ccu_mp { _muxshift, _muxwidth, \ 0, _flags) -#define SUNXI_CCU_MP_DATA_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ +#define SUNXI_CCU_MP_DATA_WITH_MUX_GATE_FEAT(_struct, _name, _parents, _reg, \ _mshift, _mwidth, \ _pshift, _pwidth, \ _muxshift, _muxwidth, \ - _gate, _flags) \ + _gate, _flags, \ + _features) \ struct ccu_mp _struct = { \ .enable = _gate, \ .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ @@ -112,13 +113,25 @@ struct ccu_mp { .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \ .common = { \ .reg = _reg, \ + .features = _features, \ .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, \ _parents, \ - &ccu_mp_ops, \ + &ccu_mp_ops,\ _flags), \ } \ } +#define SUNXI_CCU_MP_DATA_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ + _mshift, _mwidth, \ + _pshift, _pwidth, \ + _muxshift, _muxwidth, \ + _gate, _flags) \ + SUNXI_CCU_MP_DATA_WITH_MUX_GATE_FEAT(_struct, _name, _parents, \ + _reg, _mshift, _mwidth, \ + _pshift, _pwidth, \ + _muxshift, _muxwidth, \ + _gate, _flags, 0) + #define SUNXI_CCU_MP_DATA_WITH_MUX(_struct, _name, _parents, _reg, \ _mshift, _mwidth, \ _pshift, _pwidth, \