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Add reset platform data for SMI LARBs in the image, camera and IPE subsystems. Signed-off-by: Friday Yang --- drivers/clk/mediatek/clk-mt8188-cam.c | 17 +++++++++++++++++ drivers/clk/mediatek/clk-mt8188-img.c | 18 ++++++++++++++++++ drivers/clk/mediatek/clk-mt8188-ipe.c | 14 ++++++++++++++ 3 files changed, 49 insertions(+) -- 2.46.0 diff --git a/drivers/clk/mediatek/clk-mt8188-cam.c b/drivers/clk/mediatek/clk-mt8188-cam.c index 7500bd25387f..9b029fdd584e 100644 --- a/drivers/clk/mediatek/clk-mt8188-cam.c +++ b/drivers/clk/mediatek/clk-mt8188-cam.c @@ -20,6 +20,8 @@ static const struct mtk_gate_regs cam_cg_regs = { #define GATE_CAM(_id, _name, _parent, _shift) \ GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, &mtk_clk_gate_ops_setclr) +#define CAM_SYS_SMI_LARB_RST_OFF (0xA0) + static const struct mtk_gate cam_main_clks[] = { GATE_CAM(CLK_CAM_MAIN_LARB13, "cam_main_larb13", "top_cam", 0), GATE_CAM(CLK_CAM_MAIN_LARB14, "cam_main_larb14", "top_cam", 1), @@ -72,6 +74,17 @@ static const struct mtk_gate cam_yuvb_clks[] = { GATE_CAM(CLK_CAM_YUVB_CAMTG, "cam_yuvb_camtg", "top_cam", 2), }; +/* Reset for SMI larb 16a/16b/17a/17b */ +static u16 cam_sys_rst_ofs[] = { + CAM_SYS_SMI_LARB_RST_OFF, +}; + +static const struct mtk_clk_rst_desc cam_sys_rst_desc = { + .version = MTK_RST_SIMPLE, + .rst_bank_ofs = cam_sys_rst_ofs, + .rst_bank_nr = ARRAY_SIZE(cam_sys_rst_ofs), +}; + static const struct mtk_clk_desc cam_main_desc = { .clks = cam_main_clks, .num_clks = ARRAY_SIZE(cam_main_clks), @@ -80,21 +93,25 @@ static const struct mtk_clk_desc cam_main_desc = { static const struct mtk_clk_desc cam_rawa_desc = { .clks = cam_rawa_clks, .num_clks = ARRAY_SIZE(cam_rawa_clks), + .rst_desc = &cam_sys_rst_desc, }; static const struct mtk_clk_desc cam_rawb_desc = { .clks = cam_rawb_clks, .num_clks = ARRAY_SIZE(cam_rawb_clks), + .rst_desc = &cam_sys_rst_desc, }; static const struct mtk_clk_desc cam_yuva_desc = { .clks = cam_yuva_clks, .num_clks = ARRAY_SIZE(cam_yuva_clks), + .rst_desc = &cam_sys_rst_desc, }; static const struct mtk_clk_desc cam_yuvb_desc = { .clks = cam_yuvb_clks, .num_clks = ARRAY_SIZE(cam_yuvb_clks), + .rst_desc = &cam_sys_rst_desc, }; static const struct of_device_id of_match_clk_mt8188_cam[] = { diff --git a/drivers/clk/mediatek/clk-mt8188-img.c b/drivers/clk/mediatek/clk-mt8188-img.c index cb2fbd4136b9..d44bfbd8308a 100644 --- a/drivers/clk/mediatek/clk-mt8188-img.c +++ b/drivers/clk/mediatek/clk-mt8188-img.c @@ -20,6 +20,8 @@ static const struct mtk_gate_regs imgsys_cg_regs = { #define GATE_IMGSYS(_id, _name, _parent, _shift) \ GATE_MTK(_id, _name, _parent, &imgsys_cg_regs, _shift, &mtk_clk_gate_ops_setclr) +#define IMG_SYS_SMI_LARB_RST_OFF (0xC) + static const struct mtk_gate imgsys_main_clks[] = { GATE_IMGSYS(CLK_IMGSYS_MAIN_LARB9, "imgsys_main_larb9", "top_img", 0), GATE_IMGSYS(CLK_IMGSYS_MAIN_TRAW0, "imgsys_main_traw0", "top_img", 1), @@ -58,6 +60,17 @@ static const struct mtk_gate imgsys1_dip_nr_clks[] = { GATE_IMGSYS(CLK_IMGSYS1_DIP_NR_DIP_NR, "imgsys1_dip_nr_dip_nr", "top_img", 1), }; +/* Reset for SMI larb 10/11a/11b/11c/15 */ +static u16 img_sys_rst_ofs[] = { + IMG_SYS_SMI_LARB_RST_OFF, +}; + +static const struct mtk_clk_rst_desc img_sys_rst_desc = { + .version = MTK_RST_SIMPLE, + .rst_bank_ofs = img_sys_rst_ofs, + .rst_bank_nr = ARRAY_SIZE(img_sys_rst_ofs), +}; + static const struct mtk_clk_desc imgsys_main_desc = { .clks = imgsys_main_clks, .num_clks = ARRAY_SIZE(imgsys_main_clks), @@ -66,26 +79,31 @@ static const struct mtk_clk_desc imgsys_main_desc = { static const struct mtk_clk_desc imgsys_wpe1_desc = { .clks = imgsys_wpe1_clks, .num_clks = ARRAY_SIZE(imgsys_wpe1_clks), + .rst_desc = &img_sys_rst_desc, }; static const struct mtk_clk_desc imgsys_wpe2_desc = { .clks = imgsys_wpe2_clks, .num_clks = ARRAY_SIZE(imgsys_wpe2_clks), + .rst_desc = &img_sys_rst_desc, }; static const struct mtk_clk_desc imgsys_wpe3_desc = { .clks = imgsys_wpe3_clks, .num_clks = ARRAY_SIZE(imgsys_wpe3_clks), + .rst_desc = &img_sys_rst_desc, }; static const struct mtk_clk_desc imgsys1_dip_top_desc = { .clks = imgsys1_dip_top_clks, .num_clks = ARRAY_SIZE(imgsys1_dip_top_clks), + .rst_desc = &img_sys_rst_desc, }; static const struct mtk_clk_desc imgsys1_dip_nr_desc = { .clks = imgsys1_dip_nr_clks, .num_clks = ARRAY_SIZE(imgsys1_dip_nr_clks), + .rst_desc = &img_sys_rst_desc, }; static const struct of_device_id of_match_clk_mt8188_imgsys_main[] = { diff --git a/drivers/clk/mediatek/clk-mt8188-ipe.c b/drivers/clk/mediatek/clk-mt8188-ipe.c index 8f1933b71e28..70a011c1f9ce 100644 --- a/drivers/clk/mediatek/clk-mt8188-ipe.c +++ b/drivers/clk/mediatek/clk-mt8188-ipe.c @@ -20,6 +20,8 @@ static const struct mtk_gate_regs ipe_cg_regs = { #define GATE_IPE(_id, _name, _parent, _shift) \ GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift, &mtk_clk_gate_ops_setclr) +#define IPE_SYS_SMI_LARB_RST_OFF (0xC) + static const struct mtk_gate ipe_clks[] = { GATE_IPE(CLK_IPE_DPE, "ipe_dpe", "top_ipe", 0), GATE_IPE(CLK_IPE_FDVT, "ipe_fdvt", "top_ipe", 1), @@ -28,9 +30,21 @@ static const struct mtk_gate ipe_clks[] = { GATE_IPE(CLK_IPE_SMI_LARB12, "ipe_smi_larb12", "top_ipe", 4), }; +/* Reset for SMI larb 12 */ +static u16 ipe_sys_rst_ofs[] = { + IPE_SYS_SMI_LARB_RST_OFF, +}; + +static const struct mtk_clk_rst_desc ipe_sys_rst_desc = { + .version = MTK_RST_SIMPLE, + .rst_bank_ofs = ipe_sys_rst_ofs, + .rst_bank_nr = ARRAY_SIZE(ipe_sys_rst_ofs), +}; + static const struct mtk_clk_desc ipe_desc = { .clks = ipe_clks, .num_clks = ARRAY_SIZE(ipe_clks), + .rst_desc = &ipe_sys_rst_desc, }; static const struct of_device_id of_match_clk_mt8188_ipe[] = {