From patchwork Fri Feb 21 10:14:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manikanta Mylavarapu X-Patchwork-Id: 13985177 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2880F204F96; Fri, 21 Feb 2025 10:15:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740132960; cv=none; b=TP9ySOyAklJ78cTIezV0rFRtCR+FJIEDsX/npLwncnMwTGPQOZhAaisfexUYLynEvjwA8MIjZwPSm2y8aHejZVMIG/RK/UwL+xRk/ApNg4f+jQIO3Qt/DwAf48+1dXdU4i94HC9mzTx3U3AjBO7nC9gAIDLrNRGicGtbR4AODFQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740132960; c=relaxed/simple; bh=AjtuEIO3aLKlc5blqthM8ADBYKqJAsxNvPEIcv0vok4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=gpX2xpQz08sGAq4lGYdSZh9sSBZGt5IBLpPJ+rduRFYim4qmCsNvXADlnSmmZLZlUXZ4UTtyBvDC7WvnSkKmUeC0l3yHFOM+oWaRacs0JWNPI9OhGhL6a28i1RJ8KP5X6yJ3sLeCpfAIdARvgC+Hregx7w9lCqOHFusYrgUXxLM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=KgNB9HFm; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="KgNB9HFm" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51L6cTsa009360; Fri, 21 Feb 2025 10:15:41 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 79DSFu2L5TmgYR/onO+o12QMuRd3z+SaurRalry1BWc=; b=KgNB9HFm+YUrczQj c7NUlilGGMiYLMo/GJVCEUDlJJ3P7rpctNbJc/iZ7Qrijbzh1V41wLsCsyXKa48N +F8NWk1eCGzSRZC6cdyRJapjf2Q2cG4WPOMLuoMXHKWlft6ZcRBxQpp9sqP7Qqz9 GayqptCeWFe55a71ctabORt/6WLq/FN0ctbsB+8Q8Pm29gGrw8ijM2+SXwnFysY+ 0Mm2bxOiWhLqcuNpdS1AMblRAvnPDAO23/EKqcO+cd4M4/lGlhfW9NDkArltSM/J iFIPKTKZDTozlyoV4Oejr92zHLMaIsCz7hJOskRtrqIaymxKAv+LxuQMVl2WsEeD v1FfTg== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44vyy3hn4c-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 21 Feb 2025 10:15:40 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51LAFdFk002448 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 21 Feb 2025 10:15:39 GMT Received: from hu-mmanikan-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 21 Feb 2025 02:15:31 -0800 From: Manikanta Mylavarapu To: , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , Subject: [PATCH v10 5/6] arm64: dts: qcom: ipq9574: Add nsscc node Date: Fri, 21 Feb 2025 15:44:25 +0530 Message-ID: <20250221101426.776377-6-quic_mmanikan@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250221101426.776377-1-quic_mmanikan@quicinc.com> References: <20250221101426.776377-1-quic_mmanikan@quicinc.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: lfNmFZj3fQJ_1X747QlKgLs5K2LWlLIU X-Proofpoint-GUID: lfNmFZj3fQJ_1X747QlKgLs5K2LWlLIU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-21_01,2025-02-20_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1011 phishscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 spamscore=0 mlxlogscore=967 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502210077 From: Devi Priya Add a node for the nss clock controller found on ipq9574 based devices. Signed-off-by: Devi Priya Signed-off-by: Manikanta Mylavarapu --- Changes in V10: - Added clock-names. - Dropped #power-domain-cells from nsscc node, because nsscc doesn't provide any power domains. arch/arm64/boot/dts/qcom/ipq9574.dtsi | 29 +++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 942290028972..bbb5bd7f8618 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -1193,6 +1193,35 @@ pcie0: pci@28000000 { status = "disabled"; }; + nsscc: clock-controller@39b00000 { + compatible = "qcom,ipq9574-nsscc"; + reg = <0x39b00000 0x80000>; + clocks = <&xo_board_clk>, + <&cmn_pll NSS_1200MHZ_CLK>, + <&cmn_pll PPE_353MHZ_CLK>, + <&gcc GPLL0_OUT_AUX>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <&gcc GCC_NSSCC_CLK>; + clock-names = "xo", + "nss_1200", + "ppe_353", + "gpll0_out", + "uniphy0_rx", + "uniphy0_tx", + "uniphy1_rx", + "uniphy1_tx", + "uniphy2_rx", + "uniphy2_tx", + "nsscc"; + #clock-cells = <1>; + #reset-cells = <1>; + #interconnect-cells = <1>; + }; }; thermal-zones {