| Message ID | 20250318181930.1178256-1-anarsoul@gmail.com (mailing list archive) |
|---|---|
| State | Under Review |
| Headers | show |
| Series | clk: rockchip: rk3568: Add PLL rate for 33.3MHz | expand |
diff --git a/drivers/clk/rockchip/clk-rk3568.c b/drivers/clk/rockchip/clk-rk3568.c index 53d10b1c627b..1c73e18a9862 100644 --- a/drivers/clk/rockchip/clk-rk3568.c +++ b/drivers/clk/rockchip/clk-rk3568.c @@ -89,6 +89,7 @@ static struct rockchip_pll_rate_table rk3568_pll_rates[] = { RK3036_PLL_RATE(96000000, 1, 96, 6, 4, 1, 0), RK3036_PLL_RATE(78750000, 4, 315, 6, 4, 1, 0), RK3036_PLL_RATE(74250000, 2, 99, 4, 4, 1, 0), + RK3036_PLL_RATE(33300000, 4, 111, 5, 4, 1, 0), { /* sentinel */ }, };
Add PLL rate for 33.3 MHz to allow BTT HDMI5 screen to run at its native mode of 800x480 Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> --- drivers/clk/rockchip/clk-rk3568.c | 1 + 1 file changed, 1 insertion(+)