[RFC,v2,2/9] dt-bindings: soc: microchip: document the simple-mfd syscon on PolarFire SoC

Commit Message

Conor Dooley March 21, 2025, 5:22 p.m. UTC

From: Conor Dooley <[e-mail]>

"mss-top-sysreg" contains clocks, pinctrl, resets, an interrupt controller
and more. At this point, only the reset controller child is described as
that's all that is described by the existing bindings.
The clock controller already has a dedicated node, and will retain it as
there are other clock regions, so like the mailbox, a compatible-based
lookup of the syscon is sufficient to keep the clock driver working as
before, so no child is needed. There's also an interrupt multiplexing
service provided by this syscon, for which there is work in progress at
[1].

Link: https://lore.kernel.org/linux-gpio/20240723-uncouple-enforcer-7c48e4a4fefe@wendy/ [1]
Signed-off-by: Conor Dooley <[e-mail]>
---
v2:
- clean up various minor comments from Rob on mpfs-mss-top-sysreg
- remove mpfs-control-scb from this patch
---
 .../microchip,mpfs-mss-top-sysreg.yaml        | 49 +++++++++++++++++++
 1 file changed, 49 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml

Comments

Krzysztof Kozlowski March 25, 2025, 8:13 a.m. UTC | #1

On Fri, Mar 21, 2025 at 05:22:35PM +0000, Conor Dooley wrote:
> +title: Microchip PolarFire SoC Microprocessor Subsystem (MSS) sysreg register region
> +
> +maintainers:
> +  - Conor Dooley <[e-mail]>
> +
> +description:
> +  An wide assortment of registers that control elements of the MSS on PolarFire
> +  SoC, including pinmuxing, resets and clocks among others.
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: microchip,mpfs-mss-top-sysreg
> +      - const: syscon
> +      - const: simple-mfd

You need to list the children if you use simple-mfd. Commit msg
mentioned clock controller, so where is it?


> +
> +  reg:
> +    maxItems: 1
> +
> +  '#reset-cells':
> +    description:
> +      The AHB/AXI peripherals on the PolarFire SoC have reset support, so
> +      from CLK_ENVM to CLK_CFM. The reset consumer should specify the
> +      desired peripheral via the clock ID in its "resets" phandle cell.
> +      See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list
> +      of PolarFire clock/reset IDs.
> +    const: 1

Best regards,
Krzysztof

Conor Dooley March 25, 2025, 4:03 p.m. UTC | #2

On Tue, Mar 25, 2025 at 09:13:22AM +0100, Krzysztof Kozlowski wrote:
> On Fri, Mar 21, 2025 at 05:22:35PM +0000, Conor Dooley wrote:
> > +title: Microchip PolarFire SoC Microprocessor Subsystem (MSS) sysreg register region
> > +
> > +maintainers:
> > +  - Conor Dooley <[e-mail]>
> > +
> > +description:
> > +  An wide assortment of registers that control elements of the MSS on PolarFire
> > +  SoC, including pinmuxing, resets and clocks among others.
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - const: microchip,mpfs-mss-top-sysreg
> > +      - const: syscon
> > +      - const: simple-mfd
> 
> You need to list the children if you use simple-mfd. Commit msg
> mentioned clock controller, so where is it?

I don't think a child node is required here, there's not enough
clock-related properties for it to require one. However, I think you're
correct about missing properties in a general sense - there should be a
#clock-cells here and a clocks/clock-names too.
The reason there aren't is because the existing driver (that binds to
microchip,mpfs-clkcfg) looks this node up by compatible, and implements
the clock parent for this node etc. Obviously that's not an excuse to
leave the properties out, so I'll add them even though they're going to
end up ignored.

> > +  reg:
> > +    maxItems: 1
> > +
> > +  '#reset-cells':
> > +    description:
> > +      The AHB/AXI peripherals on the PolarFire SoC have reset support, so
> > +      from CLK_ENVM to CLK_CFM. The reset consumer should specify the
> > +      desired peripheral via the clock ID in its "resets" phandle cell.
> > +      See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list
> > +      of PolarFire clock/reset IDs.
> > +    const: 1
> 
> Best regards,
> Krzysztof
>

Krzysztof Kozlowski March 26, 2025, 6:53 a.m. UTC | #3

On 25/03/2025 17:03, Conor Dooley wrote:
> On Tue, Mar 25, 2025 at 09:13:22AM +0100, Krzysztof Kozlowski wrote:
>> On Fri, Mar 21, 2025 at 05:22:35PM +0000, Conor Dooley wrote:
>>> +title: Microchip PolarFire SoC Microprocessor Subsystem (MSS) sysreg register region
>>> +
>>> +maintainers:
>>> +  - Conor Dooley <[e-mail]>
>>> +
>>> +description:
>>> +  An wide assortment of registers that control elements of the MSS on PolarFire
>>> +  SoC, including pinmuxing, resets and clocks among others.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    items:
>>> +      - const: microchip,mpfs-mss-top-sysreg
>>> +      - const: syscon
>>> +      - const: simple-mfd
>>
>> You need to list the children if you use simple-mfd. Commit msg
>> mentioned clock controller, so where is it?
> 
> I don't think a child node is required here, there's not enough

Then this is not a simple-mfd.

Best regards,
Krzysztof

Conor Dooley March 26, 2025, 11 a.m. UTC | #4

On Wed, Mar 26, 2025 at 07:53:55AM +0100, Krzysztof Kozlowski wrote:
> On 25/03/2025 17:03, Conor Dooley wrote:
> > On Tue, Mar 25, 2025 at 09:13:22AM +0100, Krzysztof Kozlowski wrote:
> >> On Fri, Mar 21, 2025 at 05:22:35PM +0000, Conor Dooley wrote:
> >>> +title: Microchip PolarFire SoC Microprocessor Subsystem (MSS) sysreg register region
> >>> +
> >>> +maintainers:
> >>> +  - Conor Dooley <[e-mail]>
> >>> +
> >>> +description:
> >>> +  An wide assortment of registers that control elements of the MSS on PolarFire
> >>> +  SoC, including pinmuxing, resets and clocks among others.
> >>> +
> >>> +properties:
> >>> +  compatible:
> >>> +    items:
> >>> +      - const: microchip,mpfs-mss-top-sysreg
> >>> +      - const: syscon
> >>> +      - const: simple-mfd
> >>
> >> You need to list the children if you use simple-mfd. Commit msg
> >> mentioned clock controller, so where is it?
> > 
> > I don't think a child node is required here, there's not enough
> 
> Then this is not a simple-mfd.

The pinctrl will have one, whenever I get around to actually working on
that. I can leave the simple-mfd out until I establish exactly what
that's going to look like if that's what you want?

Krzysztof Kozlowski March 26, 2025, 2:17 p.m. UTC | #5

On 26/03/2025 12:00, Conor Dooley wrote:
> On Wed, Mar 26, 2025 at 07:53:55AM +0100, Krzysztof Kozlowski wrote:
>> On 25/03/2025 17:03, Conor Dooley wrote:
>>> On Tue, Mar 25, 2025 at 09:13:22AM +0100, Krzysztof Kozlowski wrote:
>>>> On Fri, Mar 21, 2025 at 05:22:35PM +0000, Conor Dooley wrote:
>>>>> +title: Microchip PolarFire SoC Microprocessor Subsystem (MSS) sysreg register region
>>>>> +
>>>>> +maintainers:
>>>>> +  - Conor Dooley <[e-mail]>
>>>>> +
>>>>> +description:
>>>>> +  An wide assortment of registers that control elements of the MSS on PolarFire
>>>>> +  SoC, including pinmuxing, resets and clocks among others.
>>>>> +
>>>>> +properties:
>>>>> +  compatible:
>>>>> +    items:
>>>>> +      - const: microchip,mpfs-mss-top-sysreg
>>>>> +      - const: syscon
>>>>> +      - const: simple-mfd
>>>>
>>>> You need to list the children if you use simple-mfd. Commit msg
>>>> mentioned clock controller, so where is it?
>>>
>>> I don't think a child node is required here, there's not enough
>>
>> Then this is not a simple-mfd.
> 
> The pinctrl will have one, whenever I get around to actually working on
> that. I can leave the simple-mfd out until I establish exactly what
> that's going to look like if that's what you want?


I want complete hardware, so simple-mfd with children, but if that is
not possible for some reason then at least accurate picture, thus drop
simple-mfd for now.

Best regards,
Krzysztof

Patch

diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml
new file mode 100644
index 000000000000..4794e4c6fc1f
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml
@@ -0,0 +1,49 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip PolarFire SoC Microprocessor Subsystem (MSS) sysreg register region
+
+maintainers:
+  - Conor Dooley <[e-mail]>
+
+description:
+  An wide assortment of registers that control elements of the MSS on PolarFire
+  SoC, including pinmuxing, resets and clocks among others.
+
+properties:
+  compatible:
+    items:
+      - const: microchip,mpfs-mss-top-sysreg
+      - const: syscon
+      - const: simple-mfd
+
+  reg:
+    maxItems: 1
+
+  '#reset-cells':
+    description:
+      The AHB/AXI peripherals on the PolarFire SoC have reset support, so
+      from CLK_ENVM to CLK_CFM. The reset consumer should specify the
+      desired peripheral via the clock ID in its "resets" phandle cell.
+      See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list
+      of PolarFire clock/reset IDs.
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    syscon@20002000 {
+      compatible = "microchip,mpfs-mss-top-sysreg", "syscon", "simple-mfd";
+      reg = <0x20002000 0x1000>;
+      #reset-cells = <1>;
+    };
+