Message ID | 20250327-videocc-pll-multi-pd-voting-v3-13-895fafd62627@quicinc.com (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers | show
Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3041920E001; Thu, 27 Mar 2025 09:54:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743069286; cv=none; b=MdG191v8pmKfS/9qCDRw63LcV2/bkdaJJnMTe6xCCeYLAqu4wVU2ArNXdWfOb7beCRzz7CHMyqg9ewT3hDT/fTzX3gce7yv0wjbm+xTmTpevt2vahmrHR35Z+aB2IMfTV58JDAYEYJ/Yz18NmTgIPz7c0aCLU9l9//j02lTgumw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743069286; c=relaxed/simple; bh=eH59N5ppRvUFk5vqXWogplt8HMFtvtARm5VvL7VRXZc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=WLecZBXRieyvGMAXq8lXkphsPw41/G4TGGbw43AOz8D33kc5xieVnEmI82GsRNiCWGWVJJEB7y1QeK5iPPP9GodcTeVaM1qqjNZvkbkvCs8BPiFHBFyZ3rMsTfsRl4kFwQ/5HRFYYetEC2lMTLfMpNTN9vUsjC6mIbgROCGzWyY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=nymrDXbG; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="nymrDXbG" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52R5jGkB013783; Thu, 27 Mar 2025 09:54:41 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= d4QHTVWzK6jjD+XxAjwnvVgqXME4hBIbyGVWtmmLa7Q=; b=nymrDXbGX29tHJFA 38jMtgibgvbGJ6oDJaeC3yB2SJkXZej4Q+O5+6SI/tt5nnnDHYcYjuSoMO4/AcsL b6YFYFeSCRvS3n7RUAXS8NRzPac5aj4yivOrEjN3E1mw9N0BhJmXXgMeyxmX5SuD KrG1C+aFxXQDb9eSPEmRnyIUJogyaJ96+dxtqoyRGxmd4hy5TScNF58xbZzaO0VO A+oL2AeN5ceJkIUEJI3B7he+66yPgc8AWCHB7wlMVOYiRC9RzIC0IDPEKsBc8khO 8UaGmq7L70FIUxvDYtBZLl+jjUyPa1AZPBQDbL/K0nP0uMkRSiWXNxhSb8q2xVvs 4XPAIA== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 45mffckg0f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Mar 2025 09:54:40 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 52R9sdqM005209 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Mar 2025 09:54:39 GMT Received: from [10.213.98.28] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 27 Mar 2025 02:54:34 -0700 From: Jagadeesh Kona <quic_jkona@quicinc.com> Date: Thu, 27 Mar 2025 15:22:33 +0530 Subject: [PATCH v3 13/18] arm64: dts: qcom: Add MXC power domain to videocc node on SM8450 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: <linux-clk.vger.kernel.org> List-Subscribe: <mailto:linux-clk+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-clk+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20250327-videocc-pll-multi-pd-voting-v3-13-895fafd62627@quicinc.com> References: <20250327-videocc-pll-multi-pd-voting-v3-0-895fafd62627@quicinc.com> In-Reply-To: <20250327-videocc-pll-multi-pd-voting-v3-0-895fafd62627@quicinc.com> To: Bjorn Andersson <andersson@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Konrad Dybcio <konradybcio@kernel.org>, "Vladimir Zapolskiy" <vladimir.zapolskiy@linaro.org>, Dmitry Baryshkov <lumag@kernel.org> CC: Ajit Pandey <quic_ajipan@quicinc.com>, Imran Shaik <quic_imrashai@quicinc.com>, Taniya Das <quic_tdas@quicinc.com>, "Satya Priya Kakitapalli" <quic_skakitap@quicinc.com>, <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Jagadeesh Kona <quic_jkona@quicinc.com>, Bryan O'Donoghue <bryan.odonoghue@linaro.org>, Dmitry Baryshkov <lumag@kernel.org> X-Mailer: b4 0.14.2 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=CdgI5Krl c=1 sm=1 tr=0 ts=67e52061 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=COk6AnOGAAAA:8 a=KKAkSRfTAAAA:8 a=yDpTXWEf0LF08gPbhRgA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: 6NqTzpYhyesSzPuC8725CQpUqWm4Mv0P X-Proofpoint-ORIG-GUID: 6NqTzpYhyesSzPuC8725CQpUqWm4Mv0P X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-26_09,2025-03-26_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxscore=0 spamscore=0 mlxlogscore=829 lowpriorityscore=0 suspectscore=0 phishscore=0 clxscore=1015 bulkscore=0 impostorscore=0 adultscore=0 priorityscore=1501 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503270066 |
Series |
clk: qcom: Add support to attach multiple power domains in cc probe
|
expand
|
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 0b36f4cd4497ecffe0a15cd6102e9d9ac62a7425..36a67c679fbaed944d7590528b696635c306da5d 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3198,8 +3198,10 @@ videocc: clock-controller@aaf0000 { reg = <0 0x0aaf0000 0 0x10000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_VIDEO_AHB_CLK>; - power-domains = <&rpmhpd RPMHPD_MMCX>; - required-opps = <&rpmhpd_opp_low_svs>; + power-domains = <&rpmhpd RPMHPD_MMCX>, + <&rpmhpd RPMHPD_MXC>; + required-opps = <&rpmhpd_opp_low_svs>, + <&rpmhpd_opp_low_svs>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>;